Single-semiconductor-layer channel in a memory opening for a three-dimensional non-volatile memory device

1. A method of fabricating a memory device, comprising:

forming a stack of alternating layers of a first material and a second material different from the first material over a substrate including a semiconductor material;

etching a portion of the stack to form a memory opening extending from a top surface of the stack to a top surface of the substrate;

forming a memory film layer within the memory opening;

forming a sacrificial material layer on the memory film layer;

etching horizontal portions of the sacrificial material layer and the memory film layer to physically expose a portion of the top surface of the substrate underneath the memory opening, while leaving a vertical portion of the sacrificial material layer remaining on a vertical portion of the memory film layer;

removing the sacrificial material layer selective to a remaining portion of the memory film layer; and

depositing a single semiconductor material layer on a sidewall of the remaining portion of the memory film layer to form at least an upper portion of a semiconductor channel.

2. The method of claim 1 , wherein the memory film layer comprises a stack containing, from one side to another, a blocking dielectric layer, a charge storage layer, and a tunneling dielectric layer.

3. The method of claim 1 , wherein the second material layers comprise structures selected from control gate electrodes and sacrificial material layers which are subsequently replaced with metal control gate electrodes.

4. The method of claim 1 , wherein the sacrificial material layer has an inner sidewall that is vertically coincident with a sidewall of the remaining portion of the memory film layer after the portion of the top surface of the substrate is exposed.

5. The method of claim 1 , further comprising vertically recessing a portion of the substrate while the sacrificial material layer is present on the vertical portion of the memory film layer.

6. The method of claim 1 , further comprising laterally etching a horizontal portion of the memory film layer from underneath the sacrificial material layer prior to removal of the sacrificial material layer to form a recess, wherein depositing the single semiconductor material layer comprises depositing a single semiconductor material layer in the recess.

7. The method of claim 1 , wherein the semiconductor material layer is deposited directly on a semiconductor material portion in the substrate.

8. The method of claim 1 , further comprising:

forming a single crystalline semiconductor material portion as a lower portion of the semiconductor channel directly on a single crystalline surface of the substrate by selective epitaxy; and

forming the semiconductor material layer directly on the single crystalline semiconductor material portion.

9. The method of claim 1 , further comprising treating a surface of the semiconductor material layer with a plasma of a non-electrical dopant.

10. The method of claim 1 , further comprising doping the semiconductor material layer with carbon.

11. The method of claim 1 , wherein the semiconductor material layer is in-situ doped with an electrical dopant during deposition of the semiconductor material layer.

12. The method of claim 1 , wherein the sacrificial material layer comprises a material selected from a chemical vapor deposition (CVD) silicon oxide, silicon nitride, a semiconductor material, organosilicate glass, an organic polymer, an inorganic polymer, amorphous carbon, and a diamond-like carbon.