IP Library Granted Patent US 9,626,310
Granted Patent B2
US 9,626,310 · App. 14/835,418 · Granted Apr 18, 2017

Microcontroller architecture with access stealing

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Quick Facts
Patent No.
US 9,626,310
App. No.
14/835,418
Granted
Apr 18, 2017
Kind
B2
Abstract

A microcontroller system is disclosed that includes an access stealing monitor coupled to a bus that is configured to receive a first access request from the bus for a first peripheral, duplicate the first access request, transform the first access request to a second access request on a second peripheral, and transfer the second access request to the bus. In another embodiment, a first peripheral coupled to the bus is configured to receive a first access request from the bus for the first peripheral, duplicate the first access request and transform the first access request to a second access request. A second peripheral coupled to the bus and to the first peripheral is configured to receive the second access request and to respond to the second access request. Methods of access stealing in a microcontroller system are also disclosed.

Claims (63)

1. A system comprising:

a bus;

memory coupled to the bus;

a first peripheral coupled to the bus;

a second peripheral coupled to the bus;

a controller coupled to the bus and configured to initiate access requests over the bus; and

an access stealing monitor coupled to the bus, the access stealing monitor configured to receive a read access request from the bus on the first peripheral, duplicate the first access request, transform the duplicated read access request to a write access request on the second peripheral, and transfer the write access request to the bus.

2. The system of claim 1 , wherein the first peripheral is configured to process first data in response to the read access request and to generate second data, and the second peripheral is configured to process the second data and to write the second data in response to the write access request.

3. The system of claim 1 , wherein the access stealing monitor is coupled to the second peripheral by one or more lines that are configured to indicate that the write access request is a stolen access request.

4. The system of claim 1 , further comprising:

a bus bridge coupled to the bus and including the access stealing monitor.

5. The system of claim 4 , wherein the bus bridge sends information to the second peripheral indicating that the write access request is a stolen access request.

6. A system comprising:

a bus;

memory coupled to the bus;

a controller coupled to the bus and configured to initiate access requests over the bus;

a first peripheral coupled to the bus and configured to receive a read access request from the bus for the first peripheral, duplicate the read access request and transform the duplicated read access request to a write access request; and

a second peripheral coupled to the bus and to the first peripheral, the second peripheral configured to receive the write access request and to respond to the write access request.

7. The system of claim 6 , wherein the first peripheral is configured to process first data retrieved in response to the read access request and to generate second data and the second peripheral is configured to process the second data and to write the second data in response to the write access request.

8. A method comprising:

initiating, by a controller, a read access request over a bus, the read access request destined for a first peripheral coupled to the bus;

receiving, by an access stealing monitor coupled to the bus, the duplicated read access request;

duplicating, by the access stealing monitor, the read access request;

transforming, by the access stealing monitor, the read access request to a write access request on a second peripheral coupled to the bus and to the first peripheral; and

transferring, by the access stealing monitor, the write access request to the bus.

9. The method of claim 8 , further comprising:

processing, by the first peripheral, first data retrieved in response to the read access request and to generate second data; and

processing, by the second peripheral, the second data and to write the second data in response to the write access request.

10. A method comprising:

initiating, by a controller, a read access request over a bus, the read access request for a first peripheral coupled to the bus;

receiving, by the first peripheral, the read access request;

duplicating, by the first peripheral, the read access request;

transforming, by the first peripheral, the duplicated read access request to a write access request on a second peripheral coupled to the bus and to the first peripheral; and

transferring, by the first peripheral the write access request to the second peripheral.

11. A system comprising:

a bus;

memory coupled to the bus;

a first peripheral coupled to the bus;

a second peripheral coupled to the bus;

a controller coupled to the bus and configured to initiate access requests over the bus; and

an access stealing monitor coupled to the bus, the access stealing monitor configured to receive a write access request from the bus for the first peripheral, duplicate the write access request, transform the duplicated write access request to a read access request on the second peripheral, and transfer the read access request to the bus.

12. The system of claim 11 , wherein the first peripheral is configured to write first data in response to the write access request, and the second peripheral is configured to read the first data in response to the read access request and to process the first data to generate second data.

13. A system comprising:

a bus;

memory coupled to the bus;

a controller coupled to the bus and configured to initiate access requests over the bus;

a first peripheral coupled to the bus and configured to receive a write access request from the bus for the first peripheral, duplicate the write access request and transform the duplicated write access request to a read access request; and

a second peripheral coupled to the bus and to the first peripheral, the second peripheral configured to receive the read access request and to respond to the read access request.

14. The system of claim 13 , wherein the first peripheral is configured to write first data in response to the write access request, and the second peripheral is configured to read the first data in response to the read access request and to process the first data to generate second data.

15. A method comprising:

initiating, by a controller, a write access request over a bus, the write access request destined for a first peripheral coupled to the bus;

receiving, by an access stealing monitor coupled to the bus, the write access request;

duplicating, by the access stealing monitor, the write access request;

transforming, by the access stealing monitor, the duplicated write access request to a read access request on a second peripheral coupled to the bus and to the first peripheral; and

transferring, by the access stealing monitor, the read access request to the bus.

16. The method of claim 15 , wherein the first peripheral is configured to write first data in response to the write access request, and the second peripheral is configured to read the first data in response to the read access request and to process the first data to generate second data.

17. A method comprising:

initiating, by a controller, a write access request over a bus, the write access request for a first peripheral coupled to the bus;

receiving, by the first peripheral, the write access request;

duplicating, by the first peripheral, the write access request;

transforming, by the first peripheral, the duplicated write access request to a read access request on a second peripheral coupled to the bus and to the first peripheral; and

transferring, by the first peripheral the read access request to the second peripheral.

18. The method of claim 17 , wherein the first peripheral is configured to write first data in response to the write access request, and the second peripheral is configured to read the first data in response to the read access request and to process the first data to generate second data.

Assignments (18)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENTS ERRONEOUSLY EXCLUDED FROM TERMINATION PREVIOUSLY RECORDED ON REEL 038375 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL. Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 040575/0567 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 7, 2016
From: ATMEL ROUSSET S.A.S.
To: ATMEL CORPORATION
Reel/Frame 039662/0345 →
PATENT SECURITY AGREEMENT Recorded Nov 20, 2015
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037150/0363 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2015
From: PEAN, GUILLAUME; TIENNOT, RENAUD; DEBOUT, VINCENT
To: ATMEL ROUSSET S.A.S.
Reel/Frame 036418/0290 →