Dielectric stack
View Patent ↗An integrated circuit with a pressure resistant current carrying structure having electrically conductive layers for carrying current. A first electrically nonconductive material at least partially surrounds the electrically conductive layers, and provides electrical insulation between the electrically conductive layers. The first electrically nonconductive material has a first degree of fragility and a first dielectric constant. A second electrically nonconductive material is disposed in a pattern within the first electrically nonconductive material and between the electrically conductive layers, and provides structural support for the first electrically nonconductive material between the electrically conductive layers. The second electrically nonconductive material has a second degree of fragility that is less than the first degree of fragility and a second dielectric constant that is greater than the first dielectric constant.
1. In an integrated circuit, the improvement comprising a pressure resistant current carrying structure having:
electrically conductive layers for carrying current,
a first electrically nonconductive material at least partially surrounding the electrically conductive layers, the first electrically nonconductive material providing electrical insulation between the electrically conductive layers, the first electrically nonconductive material having a first degree of fragility and a first dielectric constant, wherein the first electrically nonconductive material directly contacts and underlies a bottom surface of an overlying electrically conductive layer below which it is disposed and a top surface of an underlying electrically conductive layer above which it is disposed, and
a second electrically nonconductive material disposed in a pattern within the first electrically nonconductive material between the electrically conductive layers, the second electrically nonconductive material providing structural support for the first electrically nonconductive material between the electrically conductive layers, the second electrically nonconductive material having a second degree of fragility that is less than the first degree of fragility and a second dielectric constant that is greater than the first dielectric constant, wherein the second electrically nonconductive material directly contacts a bottom surface of an overlying electrically conductive layer below which it is disposed and a top surface of an underlying electrically conductive layer above which it is disposed.
2. The integrated circuit of claim 1 , wherein the electrically conductive layers comprise metal layers.
3. The integrated circuit of claim 1 , wherein the electrically conductive layers comprise copper layers.
4. The integrated circuit of claim 1 , wherein the first dielectric constant is less than about three.
5. The integrated circuit of claim 1 , wherein the second dielectric constant of the second electrically nonconductive material is greater than about three and one-half.
6. The integrated circuit of claim 1 , wherein the second electrically nonconductive material comprises a silicon oxide.
7. The integrated circuit of claim 1 , wherein the pattern comprises horizontal bars.
8. The integrated circuit of claim 1 , wherein the pattern comprises vertical bars.
9. The integrated circuit of claim 1 , wherein the pattern comprises horizontal and vertical bars.
10. The integrated circuit of claim 1 , wherein the pattern comprises a plurality of pillars.
11. In an integrated circuit, the improvement comprising a pressure resistant bonding pad structure having:
an electrically conductive upper bonding pad layer,
an electrically conductive pressure dispersion layer in electrical contact with the electrically conductive upper bonding pad layer, the electrically conductive pressure dispersion layer forming a grid pattern for receiving and dispersing pressure applied to the electrically conductive upper bonding pad layer such as during bonding and probing procedures,
additional electrically conductive layers underlying the electrically conductive pressure dispersion layer,
a first electrically nonconductive material at least partially surrounding the additional electrically conductive layers, the first electrically nonconductive material providing electrical insulation between the additional electrically conductive layers, the first electrically nonconductive material having a first degree of fragility and a first dielectric constant, wherein the first electrically nonconductive material directly contacts and underlies a bottom surface of an overlying electrically conductive layer below which it is disposed and a top surface of an underlying electrically conductive layer above which it is disposed, and
a second electrically nonconductive material disposed in a pattern within the first electrically nonconductive material between the electrically conductive pressure dispersion layer and the additional electrically conductive layers, the second electrically nonconductive material providing structural support for the first electrically nonconductive material between the additional electrically conductive layers, the second electrically nonconductive material having a second degree of fragility that is less than the first degree of fragility and a second dielectric constant that is greater than the first dielectric constant, wherein the second electrically nonconductive material directly contacts a bottom surface of an overlying electrically conductive layer below which it is disposed and a top surface of an underlying electrically conductive layer above which it is disposed.
12. The integrated circuit of claim 11 , wherein the first electrically nonconductive material further at least partially surrounds the electrically conductive pressure dispersion layer.
13. The integrated circuit of claim 11 , wherein the pattern of the second electrically nonconductive material matches the grid pattern of the electrically conductive pressure dispersion layer.
14. The integrated circuit of claim 11 , wherein the second electrically nonconductive material only underlies the grid pattern of the electrically conductive pressure dispersion layer.
15. The integrated circuit of claim 11 , wherein the electrically conductive pressure dispersion layer comprises copper.
16. The integrated circuit of claim 11 , wherein the first dielectric constant is less than about three.
17. The integrated circuit of claim 11 , wherein the second electrically nonconductive material comprises silicon dioxide.
18. The integrated circuit of claim 11 , wherein the pattern comprises a plurality of pillars underlying the grid pattern of the electrically conductive pressure dispersion layer.
19. In an integrated circuit, the improvement comprising a pressure resistant bonding pad structure having:
an electrically conductive upper bonding pad layer,
an electrically conductive pressure dispersion layer in electrical contact with the electrically conductive upper bonding pad layer, the electrically conductive pressure dispersion layer forming a grid pattern for receiving and dispersing pressure applied to the electrically conductive upper bonding pad layer such as during bonding and probing procedures,
additional electrically conductive layers underlying the electrically conductive pressure dispersion layer,
a first electrically nonconductive material at least partially surrounding the additional electrically conductive layers, the first electrically nonconductive material providing electrical insulation between the additional electrically conductive layers, the first electrically nonconductive material having a first degree of fragility and a first dielectric constant, wherein the first electrically nonconductive material directly contacts and underlies a bottom surface of an overlying electrically conductive layer below which it is disposed and a top surface of an underlying electrically conductive layer above which it is disposed,
a second electrically nonconductive material disposed in a pattern within the first electrically nonconductive material between the electrically conductive pressure dispersion layer and the additional electrically conductive layers, the second electrically nonconductive material providing structural support for the first electrically nonconductive material between the additional electrically conductive layers, the second electrically nonconductive material having a second degree of fragility that is less than the first degree of fragility and a second dielectric constant that is greater than the first dielectric constant, wherein the second electrically nonconductive material directly contacts a bottom surface of an overlying electrically conductive layer below which it is disposed and a top surface of an underlying electrically conductive layer above which it is disposed, and
additional active circuitry underlying the additional electrically conductive layers, the additional active circuitry protected from pressure applied to the electrically conductive upper bonding pad layer by the electrically conductive pressure dispersion layer and the second electrically nonconductive material.
20. The integrated circuit of claim 19 , wherein the additional active circuitry comprises input output circuitry.