Robust high density substrate design for thermal cycling reliability
A semiconductor package for a die with improved thermal cycling reliability. A first layer of the package provides ball pads dispersed throughout. A second layer of the package provides signal traces. A high stress area associated with the corner of the dies is defined. Preferably the high stress area is defined as two ball pitches away from the corner of the die. Signal traces are routed away from the high stress area and in particular signal traces are routed away from the ball pads associated with the high stress to eliminate the cracks in the routed traces.
1. A semi-conductor package comprising:
a top layer having a die mounted thereon, said die having a corner; and
a plurality of layers under the top layer, said plurality of layers comprising a bottom routing layer having signal traces thereon, and a ball pad layer under the bottom routing layer, said ball pad layer having a plurality of ball pads, wherein none of the signal traces of the bottom routing layer are located over ball pads of the ball pad layer which are disposed in an area within two ball pad pitches of the corner of the die.
2. A package as recited in claim 1 , wherein none of the signal traces of the bottom routing layer are located within two ball pad pitches of the corner of the die.
3. A package as recited in claim 1 , wherein said ball pad layer has a plurality of ball pads dispersed thereon and no metal traces on the ball pad layer which are connected to the ball pads.
4. A package as recited in claim 1 , wherein the package comprises nine layers with the routing layer being the eighth layer and the ball pad layer being the ninth layer, on a bottom of the package.
5. A package as recited in claim 1 , wherein the die is mounted to the top layer in an arrangement other than a pin connection.
6. A package as recited in claim 1 , wherein the signal traces on the bottom routing layer comprise at least one voltage bus bar.
7. A semi-conductor package comprising:
a top layer having a die mounted thereon, said die having a corner defining a surrounding area of increased stress; and
a plurality of layers under the top layer, said plurality of layers comprising a bottom routing layer having signal traces thereon, and a ball pad layer under the bottom routing layer, said ball pad layer having a plurality of ball pads dispersed thereon, wherein none of the signal traces of the bottom routing layer are located within the area of increased stress defined by the corner of the die.
8. A package as recited in claim 7 , wherein none of the signal traces of the bottom routing layer are located within two ball pad pitches of the corner of the die.
9. A package as recited in claim 7 , wherein said ball pad layer has a plurality of ball pads dispersed thereon and no metal traces on the ball pad layer which are connected to the ball pads.
10. A package as recited in claim 7 , wherein the package comprises nine layers with the routing layer being the eighth layer and the ball pad layer being the ninth layer, on a bottom of the package.
11. A package as recited in claim 7 , wherein the die is mounted to the top layer in an arrangement other than a pin connection.
12. A package as recited in claim 7 wherein the signal traces on the bottom routing layer comprise at least one voltage bus bar.