IP Library Granted Patent US 8,125,076
Granted Patent B2
US 8,125,076 · App. 11/164,132 · Granted Feb 28, 2012

Semiconductor package system with substrate heat sink

Assignee: Stats Chippac Ltd.
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Quick Facts
Patent No.
US 8,125,076
App. No.
11/164,132
Granted
Feb 28, 2012
Kind
B2
Abstract

A semiconductor package system is provided including: providing a substrate having substrate wiring and a cavity provided therein with a heat sink foil closing off the cavity; attaching a semiconductor die in the cavity to the heat sink foil; and bonding the semiconductor die to the substrate wiring.

Claims (56)

1. A method of manufacture of a semiconductor package system comprising:

providing a substrate having substrate wiring, formed from a top foil and a bottom foil, and a cavity provided therein with a heat sink formed from the bottom foil closing off the cavity on a first side of the substrate with the bottom of the heat sink exposed;

attaching a semiconductor die in the cavity on the heat sink, the semiconductor die connected to a top foil first portion by wire bonds; and

depositing solder balls on a top foil second portion, isolated on the second side of the substrate from the top foil first portion, the top foil first portion and the top foil second portion both connected to a portion of the bottom foil isolated from the heat sink with the top foil first portion connected to the wire bonds.

2. The method as claimed in claim 1 wherein attaching the semiconductor die includes conductively connecting the semiconductor die to the heat sink.

3. The method as claimed in claim 1 wherein providing the substrate includes providing the substrate from a substrate strip for manufacturing a plurality of semiconductor package systems.

4. The method as claimed in claim 1 further comprising conductively connecting the semiconductor die to the heat sink and to a printed circuit board.

5. The method as claimed in claim 1 further comprising:

mounting the substrate on a printed circuit board, the substrate having first substrate wiring; and

stacking a second substrate on the substrate, the second substrate having solder balls for conductive connection to the first substrate wiring.

6. A method of manufacture of a semiconductor package system comprising:

providing a substrate having substrate wiring, formed from a top foil and a bottom foil, and a cavity provided therein and a heat sink foil formed from the bottom foil closing off the cavity on a first side of the substrate;

attaching solder balls to a top foil second portion, isolated on a second side of the substrate from a top foil first portion, the top foil first portion and the top foil second portion both connected to a portion of the bottom foil isolated from the heat sink with the top foil first portion connected to wire bonds;

attaching a semiconductor die in the cavity on the heat sink foil;

wire bonding the semiconductor die to the substrate wiring with the bond wires on the second side of the substrate and adjacent to the solder balls; and

encapsulating the semiconductor die in the cavity and over the bond wires on the second side of the substrate with the bottom of the heat sink foil exposed.

7. The method as claimed in 6 wherein attaching the semiconductor die uses a conductive die attach adhesive to conductively connect the semiconductor die to the heat sink foil.

8. The method as claimed in 6 wherein:

providing the substrate includes providing the substrate from a substrate strip;

attaching a semiconductor die includes attaching a plurality of semiconductor die to the substrate strip; and

singulating the substrate strip into a plurality of substrates.

9. The method as claimed in 6 further comprising:

mounting the substrate on a printed circuit board using the solder balls; and

conductively connecting the semiconductor die and heat sink foil to the printed circuit board.

10. The method as claimed in 6 wherein:

encapsulating the semiconductor die forms a first semiconductor package system;

mounting the first semiconductor package system on a printed circuit board, the first semiconductor package system having first substrate wiring; and

stacking a second semiconductor package system on the first semiconductor package system, the second semiconductor package system having solder balls conductively connected to the first substrate wiring.

11. A semiconductor package system comprising:

a substrate having substrate wiring, formed from a top foil and a bottom foil, and a cavity provided therein with a heat sink formed from the bottom foil closing off the cavity on a first side of the substrate with the bottom of the heat sink exposed;

a semiconductor die in the cavity attached on the heat sink and connected to a top foil first portion by bond wires; and

solder balls on the substrate wiring on a top foil second portion, isolated on the second side of the substrate from the top foil first portion, the top foil first portion and the top foil second portion both connected to a portion of the bottom foil isolated from the heat sink with the top foil first portion connected to the wire bonds.

12. The system as claimed in claim 11 further comprising a conductive connection for connecting the semiconductor die to the heat sink.

13. The system as claimed in claim 11 wherein the substrate is part of a substrate strip for manufacturing a plurality of semiconductor package systems.

14. The system as claimed in claim 11 further comprising:

a printed circuit board; and

a conductive connection for connecting the semiconductor die to the heat sink and to the printed circuit board.

15. The system as claimed in claim 11 further comprising:

the substrate mounted on a printed circuit board, the substrate having first substrate wiring; and

a second substrate stacked on the substrate, the second substrate having solder balls for conductive connection to the first substrate wiring.

16. The system as claimed in claim 11 further comprising:

an encapsulant around the semiconductor die in the cavity and over the bond wires on the second side of the substrate; and

the heat sink made of a heat sink foil with the bottom of the heat sink foil exposed by the encapsulant.

17. The system as claimed in claim 16 further comprising a conductive die attach adhesive to conductively connect the semiconductor die to the heat sink foil.

18. The system as claimed in claim 16 wherein:

the substrate is part of a substrate strip; and

a plurality of semiconductor die is mounted to the substrate strip.

19. The system as claimed in claim 16 further comprising:

a printed circuit board;

the substrate mounted on the printed circuit board by the solder balls; and

the semiconductor die and the heat sink foil are conductively connected to the printed circuit board.

20. The system as claimed in claim 16 further comprising:

a printed circuit board;

the semiconductor die is included in a first semiconductor package system;

the first semiconductor package system is mounted on the printed circuit board, the first semiconductor package system having first substrate wiring; and

a second semiconductor package system stacked on the first semiconductor package system, the second semiconductor package system having solder balls conductively connected to the first substrate wiring.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0474 ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 8, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064842/0046 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38378 FRAME: 0280) Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064789/0474 →
RELEASE OF SECURITY INTEREST Recorded Jun 9, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052879/0852 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0280 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2005
From: KIM, GWANG; LEE, KOO HONG
To: STATS CHIPPAC LTD.
Reel/Frame 016767/0851 →
Continuity (2)
Provisional Application 60627645 · Nov 12, 2004
Related Publication 20060103010A1 · May 18, 2006