IP Library Granted Patent US 7,968,371
Granted Patent B2
US 7,968,371 · App. 11/164,336 · Granted Jun 28, 2011

Semiconductor package system with cavity substrate

Assignee: STATS ChipPAC Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,968,371
App. No.
11/164,336
Granted
Jun 28, 2011
Kind
B2
Abstract

A semiconductor package system is provided including providing a cavity substrate having a cavity provided therein, attaching a metal die pad to the cavity substrate, attaching a semiconductor die in the cavity to the metal die pad, and attaching solder connectors to the cavity substrate for connection on the system board with the metal die pad on the system board.

Claims (58)

1. A method of manufacturing a semiconductor package system comprising:

providing a cavity substrate, having a cavity provided therethrough, including a top foil protector on a top surface of the cavity substrate and a bottom foil protector on a bottom surface of the cavity substrate;

attaching a metal die pad in an underside rim of the cavity substrate;

attaching a semiconductor die in the cavity to the metal die pad;

bonding the semiconductor die with bond wires to the cavity substrate;

encapsulating the bond wires in a wire encapsulant;

encapsulating the semiconductor die and the wire encapsulant; and

attaching solder connectors to the cavity substrate for connection on a system board with the metal die pad on the system board.

2. The method as claimed in 1 wherein:

attaching the metal die pad includes forming the metal die pad to have a cross-section with a pedestal.

3. The method as claimed in 1 wherein attaching the metal die pad includes forming the metal die pad to have a rectangular cross-section.

4. The method as claimed in 1 wherein attaching the metal die pad further comprises forming the metal die pad as a paddle to have a shape of a circle, a square with perpendicular arms, or a square with 45 degree arms.

5. The method as claimed in 1 further comprising:

conductively attaching the cavity substrate to conductive wiring on the system board; and

conductively attaching the metal die pad to the conductive wiring on the system board.

6. A method of manufacturing a semiconductor package system comprising:

providing a cavity substrate, having a cavity provided therethrough, including a top foil protector on a top surface of the cavity substrate and a bottom foil protector on a bottom surface of the cavity substrate;

attaching a metal die pad in an underside rim of the cavity substrate at the bottom of the cavity;

attaching a semiconductor die in the cavity to the metal die pad;

bonding the semiconductor die with bond wires to the cavity substrate;

encapsulating the bond wires in a wire encapsulant;

encapsulating the semiconductor die and the wire encapsulant; and

attaching solder balls to the cavity substrate for connection on a system board with the metal die pad on the system board.

7. The method as claimed in 6 wherein: attaching the metal die pad includes forming the metal die pad to have a cross-section with a pedestal; and attaching the metal die pad indicates bonding the metal die pad at outer extremities thereof to the cavity substrate.

8. The method as claimed in 6 wherein:

attaching the metal die pad includes forming the metal die pad to have a rectangular cross-section; and

attaching the metal die pad includes bonding the metal die pad at an outer periphery thereof to the cavity substrate.

9. The method as claimed in 6 wherein:

attaching the metal die pad further comprises forming the metal die pad as a paddle to have a shape of a circle, a square with perpendicular arms, or a square with 45 degree arms; and

attaching the metal die pad includes bonding the metal die pad at an outer periphery thereof to the cavity substrate.

10. The method as claimed in 6 further comprising:

conductively attaching the cavity substrate to conductive wiring on the system board by the solder balls; and

conductively attaching the metal die pad to the conductive wiring on the system board by a conductive interconnection.

11. A semiconductor package system for attachment to a system board, comprising:

a cavity substrate, having a cavity provided therethrough, including a top foil protector on a top surface of the cavity substrate and a bottom foil protector on a bottom surface of the cavity substrate;

a metal die pad attached in an underside rim of the cavity substrate;

a semiconductor die in the cavity attached to the metal die pad; bond wires bonding the semiconductor die to the cavity substrate;

a wire encapsulant encapsulating the bond wires;

an encapsulant encapsulating the semiconductor die and the wire encapsulant; and

solder connectors attached to the cavity substrate for connection on the system board with the metal die pad on the system board.

12. The system as claimed in 11 wherein:

wherein the metal die pad has a cross-section with a pedestal.

13. The system as claimed in 11 wherein the metal die pad has a rectangular cross-section.

14. The system as claimed in 11 wherein the metal die pad is a paddle with a shape of a circle, a square with perpendicular arms, or a square with 45 degree arms.

15. The system as claimed in 11 further comprising:

the system board having conductive wiring;

the cavity substrate conductively attached to the conductive wiring on the system board; and

the metal die pad conductively attached to the conductive wring on the system board.

16. The system as claimed in 11 wherein:

the metal die pad is attached to the cavity substrate at the bottom of the cavity.

17. The system as claimed in 16 further comprising:

a top metal heat sink above or around the semiconductor die; and

the top metal heat sink partially encapsulated in a mold compound.

18. The system as claimed in 16 wherein the metal die pad is bonded at the outer periphery thereof to the cavity substrate.

19. The system as claimed in 16 wherein the metal die pad is bonded at the outer extremity thereof to the cavity substrate.

20. The system as claimed in 16 wherein:

the cavity substrate is conductively attached to conductive wiring on the system board by solder balls; and

the metal die pad is conductively attached to the conductive wiring on the system board by a conductive grease.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVER SHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 064783 FRAME 0896. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE CHANGE OF NAME. Recorded Sep 22, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065015/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVERSHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 038378 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 14, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064962/0123 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0292) Recorded Aug 30, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE.LTE.
Reel/Frame 064783/0896 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052907/0650 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0292 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2011
From: KIM, OHSUG; KIM, DEAWHAN; KIM, SANGJO
To: STATS CHIPPAC LTD.
Reel/Frame 026355/0219 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2005
From: KIM, OHSUG; KIM, DEAWHAN; KIM, SANGJO
To: STATS CHIPPAC LTD.
Reel/Frame 016796/0462 →
Continuity (2)
Provisional Application 60649239 · Feb 1, 2005
Related Publication 20060170092A1 · Aug 3, 2006