Stacked integrated circuit and package system
View Patent ↗A stacked integrated circuit and package system including attaching a first top integrated circuit over an upper surface of a top substrate, attaching a second top integrated circuit over a lower surface of the top substrate, forming top electrical connectors on the lower surface of the top substrate, and connecting a bottom package to the top electrical connectors.
1. A method for manufacturing a stacked integrated circuit and package system comprising:
providing a first top integrated circuit in a top substrate;
attaching a second top integrated circuit directly on and below the first top integrated circuit;
attaching a third top integrated circuit directly on the first top integrated circuit; and
forming an electrical connector on a lower surface of the top substrate so a flattened side of the electrical connector is coplanar with a side of the first top integrated circuit and a side of the third top integrated circuit.
2. The method as claimed in claim 1 further comprising attaching a high temperature resistant layer on the top substrate.
3. The method as claimed in claim 1 further comprising attaching a temporary layer on the bottom substrate.
4. The method as claimed in claim 1 wherein forming the electrical connector further comprise forming a solder ball grid array.
5. The method as claimed in claim 1 further comprising connecting a bottom package to further electrical connectors on the top substrate.