IP Library Granted Patent US 7,521,297
Granted Patent B2
US 7,521,297 · App. 11/276,948 · Granted Apr 21, 2009

Multichip package system

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Quick Facts
Patent No.
US 7,521,297
App. No.
11/276,948
Granted
Apr 21, 2009
Kind
B2
Abstract

A multichip package system is provided forming a substrate having a plurality of molding transfer channel, connecting a first integrated circuit die on a top side of the substrate, connecting a second integrated circuit die on a bottom side of the substrate, and concurrently encapsulating the first integrated circuit die and the second integrated circuit die with a molding compound flow through the plurality of the molding transfer channels.

Claims (52)

1. A multichip package system comprising:

forming a substrate having a plurality of molding transfer channels;

connecting a first integrated circuit die on a top side of the substrate;

connecting a second integrated circuit die on a bottom side of the substrate; and

concurrently encapsulating the first integrated circuit die and the second integrated circuit die with a molding compound flow through the plurality of the molding transfer channels.

2. The system as claimed in claim 1 wherein forming the substrate includes forming a shield in the substrate.

3. The system as claimed in claim 1 wherein:

forming the substrate having the plurality of the molding transfer channels comprises:

forming an extension of the substrate, the extension having a molding transfer channel; and

concurrently encapsulating the first integrated circuit die and the second integrated circuit die with the molding compound flow through the plurality of the molding transfer channels further comprises:

forming a center gate mold with the molding compound flow from the molding transfer channel through bottom runners at the bottom side of the substrate to cover the second integrated circuit die.

4. The system as claimed in claim 1 wherein connecting the first integrated circuit die on the top side includes attaching the first integrated circuit die over a portion of the plurality of the molding transfer channels.

5. The system as claimed in claim 1 wherein forming the substrate having the plurality of the molding transfer channels comprises:

forming the substrate having bond pads; and

forming a configuration of the plurality of the molding transfer channels comprised of the molding transfer channels between the bond pads and edges of the substrate, the molding transfer channels between the bond pads, the molding transfer channels in a vertical orientation, the molding transfer channels in a horizontal orientation, and a combination thereof.

6. A multichip package system comprising:

forming a substrate having a plurality of molding transfer channels and a bond pad;

connecting a first integrated circuit die and a device on a top side of the substrate;

connecting a second integrated circuit die on a bottom side of the substrate;

concurrently encapsulating the first integrated circuit die and the second integrated circuit die with a molding compound flow through the plurality of the molding transfer channels; and

attaching an external interconnect on the bottom side.

7. The system as claimed in claim 6 wherein connecting the first integrated circuit die includes connecting a bond wire between the first integrated circuit die and the top side.

8. The system as claimed in claim 6 wherein connecting the first integrated circuit die includes connecting a solder bump between the first integrated circuit die and the top side.

9. The system as claimed in claim 6 wherein connecting the second integrated circuit die includes connecting a bond wire between the second integrated circuit die and the bottom side.

10. The system as claimed in claim 6 wherein connecting the second integrated circuit die includes connecting a solder bump between the second integrated circuit die and the bottom side.

11. A multichip package system comprising:

a substrate having a plurality of molding transfer channels;

a first integrated circuit die on a top side of the substrate;

a second integrated circuit die on a bottom side of the substrate; and

an encapsulation to cover the first integrated circuit die and the second integrated circuit die with a molding compound flow through the plurality of the molding transfer channels.

12. The system as claimed in claim 11 wherein the substrate includes a shield in the substrate.

13. The system as claimed in claim 11 wherein:

the substrate having the plurality of the molding transfer channels comprises:

an extension of the substrate, the extension having a molding transfer channel; and

an encapsulation to cover the first integrated circuit die and the second integrated circuit die with the molding compound flow through the plurality of the molding transfer channels further comprises:

a center gate mold with the molding compound flow from the molding transfer channel through bottom runners at the bottom side of the substrate to cover the second integrated circuit die.

14. The system as claimed in claim 11 wherein the first integrated circuit die on the top side includes the first integrated circuit die over a portion of the plurality of the molding transfer channels.

15. The system as claimed in claim 11 wherein the substrate having the plurality of the molding transfer channels comprises:

the substrate having bond pads; and

a configuration of the plurality of the molding transfer channels comprised of the molding transfer channels between the bond pads and edges of the substrate, the molding transfer channels between the bond pads, the molding transfer channels in a vertical orientation, the molding transfer channels in a horizontal orientation, and a combination thereof.

16. The system as claimed in claim 11 wherein:

the substrate having the plurality of the molding transfer channels has a shield therein;

the first integrated circuit die on the top side of the substrate is attached with an adhesive;

the second integrated circuit die on the bottom side of the substrate is attached with the adhesive; and

the encapsulation to cover the first integrated circuit die and the second integrated circuit die with a molding compound through the molding transfer channel is a cover of the top side;

further comprising:

the substrate having a bond pad; and

an external interconnect on the bottom side.

17. The system as claimed in claim 16 wherein the first integrated circuit die on the top side includes a bond wire between the first integrated circuit die and the top side.

18. The system as claimed in claim 16 wherein the first integrated circuit die on the top side includes a solder bump between the first integrated circuit die and the top side.

19. The system as claimed in claim 16 wherein the second integrated circuit die on the bottom side includes a bond wire between the second integrated circuit die and bottom side.

20. The system as claimed in claim 16 wherein the second integrated circuit die on the bottom side includes a solder bump between the second integrated circuit die and bottom side.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC, PTE. LTE TO STATS CHIPPAC PTE. LTD (REEL: 038378 FRAME: 0319) Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064760/0986 →
RELEASE OF SECURITY INTEREST Recorded Jun 15, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052938/0305 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0319 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2006
From: LEE, SEONGMIN; AHN, SEUNGYUN; LEE, KOO HONG
To: STATS CHIPPAC LTD.
Reel/Frame 017330/0654 →