IP Library Granted Patent US 8,124,520
Granted Patent B2
US 8,124,520 · App. 11/456,551 · Granted Feb 28, 2012

Integrated circuit mount system with solder mask pad

Assignee: Stats Chippac Ltd.
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Quick Facts
Patent No.
US 8,124,520
App. No.
11/456,551
Granted
Feb 28, 2012
Kind
B2
Abstract

An integrated circuit mount system includes an integrated circuit, a solder mask for the integrated circuit, and a solder mask pad on the substrate with the solder mask.

Claims (40)

1. A method to fabricate an integrated circuit mount system comprising:

providing a substrate having an active surface;

stacking an integrated circuit over the substrate;

forming a solder mask for the integrated circuit;

forming a solder mask pad directly on the active surface of the substrate with the solder mask; and

forming a pre-solderable layer directly on the active surface of the substrate and directly in contact with sides of the solder mask pad and a vertical side of the solder mask, the vertical side extending from the active surface to a horizontal side of the solder mask facing away from the active side.

2. The method as claimed in claim 1 wherein forming the solder mask pad includes forming the solder mask pad in an opening in the solder mask.

3. The method as claimed in claim 1 wherein forming the pre-solderable layer forms a metal layer on the substrate.

4. The method as claimed in claim 1 wherein forming the solder mask pad includes forming the solder mask pad having a height lower than the height of a bump or ball pad.

5. The method as claimed in claim 1 wherein forming the solder mask pad includes forming the solder mask pad having a planar dimension smaller than a planar dimension of a bump or ball pad.

6. A method to fabricate an integrated circuit mount system comprising:

providing a substrate having an active surface;

stacking an integrated circuit, having a bond pad, over the substrate;

forming a solder mask for the bond pad of the integrated circuit;

forming a solder mask pad on the active surface of the substrate with the solder mask;

forming a pre-solderable layer directly on the active surface of the substrate and directly in contact with sides of the solder mask pad and a vertical side of the solder mask, the vertical side extending from the active surface to a horizontal side of the solder mask facing away from the active side; and

forming a connector directly on the pre-solderable layer and the solder mask pad.

7. The method as claimed in claim 6 wherein forming the solder mask pad includes forming the solder mask pad self-aligned to the solder mask.

8. The method as claimed in claim 6 wherein forming the solder mask pad includes forming the solder mask pad having a width less than 150 um.

9. The method as claimed in claim 6 wherein forming the solder mask pad includes applying solder-on-pad over the solder mask pad.

10. The method as claimed in claim 6 wherein forming a connector includes providing improved reliability of an intermetallic layer under the connector.

11. An integrated circuit mount system comprising:

a substrate having an active surface;

an integrated circuit over the substrate;

a solder mask for the integrated circuit;

a solder mask pad directly on the active surface of the substrate with the solder mask; and

a pre-solderable layer directly on the active surface of the substrate and directly in contact with sides of the solder mask pad and a vertical side of the solder mask extending from the active surface to a horizontal side of the solder mask facing away from the active side.

12. The system as claimed in claim 11 wherein the solder mask pad includes the solder mask pad in an opening in the solder mask.

13. The system as claimed in claim 11 wherein the pre-solderable layer forms a metal layer on the substrate.

14. The system as claimed in claim 11 wherein the solder mask pad includes the solder mask pad having a height lower than the height of a bump or ball pad.

15. The system as claimed in claim 11 wherein the solder mask pad includes the solder mask pad having a planar dimension smaller than a planar dimension of a bump or ball pad.

16. The system as claimed in claim 11 wherein:

the integrated circuit having a bond pad;

the solder mask for the bond pad of the integrated circuit;

the solder mask pad on the substrate with the solder mask; and further comprising:

a connector on the solder mask pad.

17. The system as claimed in claim 16 wherein the solder mask pad includes the solder mask pad self-aligned to the solder mask.

18. The system as claimed in claim 16 wherein the solder mask pad includes the solder mask pad having a width less than 150 um.

19. The system as claimed in claim 16 wherein the solder mask pad includes solder-on-pad over the solder mask pad.

20. The system as claimed in claim 16 wherein a connector includes improved reliability of an intermetallic layer under the connector.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0474 ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 8, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064842/0046 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38378 FRAME: 0280) Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064789/0474 →
RELEASE OF SECURITY INTEREST Recorded Jun 9, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052879/0852 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0280 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2006
From: KIM, KYUNGOE; CHOI, HAENGCHEOL; KIM, KYUNG MOON; PENDSE, RAJENDRA D.
To: STATS CHIPPAC LTD.
Reel/Frame 017923/0201 →
Continuity (1)
Related Publication 20080014738A1 · Jan 17, 2008