IP Library Granted Patent US 7,687,919
Granted Patent B2
US 7,687,919 · App. 11/463,855 · Granted Mar 30, 2010

Integrated circuit package system with arched pedestal

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Quick Facts
Patent No.
US 7,687,919
App. No.
11/463,855
Granted
Mar 30, 2010
Kind
B2
Abstract

An integrated circuit package system includes an arched pedestal integrated circuit die including an active surface, a die mounting surface, a pedestal portion including an arch intersecting the die mounting surface and having an arch height, and the arch under a portion of the active surface and having an arch width less than the arch height.

Claims (62)

1. An integrated circuit package system comprising:

forming an arched pedestal integrated circuit die including:

forming an active surface;

providing a die mounting surface;

forming a pedestal portion including:

forming an arch intersecting the die mounting surface and having an arch height; and

forming the arch under a portion of the active surface and having an arch width less than the arch height.

2. The system as claimed in claim 1 wherein forming the arched pedestal integrated circuit die includes forming a second, third, or fourth arch.

3. The system as claimed in claim 1 further comprising:

providing a base integrated circuit die; and

wherein forming the arched pedestal integrated circuit die includes:

forming the pedestal portion smaller than the base integrated circuit die.

4. The system as claimed in claim 1 further comprising attaching electrical connectors between a package substrate and a base integrated circuit die, between the package substrate and the arched pedestal integrated circuit die, and filling an encapsulant between the arch and the electrical connectors.

5. The system as claimed in claim 1 further comprising:

providing an integrated circuit wafer;

applying a singulation apparatus for one-step arch-formation and singulation of the arched pedestal integrated circuit die from the integrated circuit wafer.

6. An integrated circuit package system comprising:

forming an arched pedestal integrated circuit die including:

forming an active surface and forming arched pedestal die pads adjacent at least one edge thereof;

providing a die mounting surface on the opposite side of the die from the active surface;

forming a pedestal portion including:

forming an arch intersecting the die mounting surface and having an arch height;

forming the arch under a portion of the active surface and having an arch width less than the arch height; and

forming an overhang edge adjacent the portion of the arch adjacent the active surface.

7. The system as claimed in claim 6 wherein forming the arched pedestal integrated circuit die includes forming a second, third, or fourth arch with a ratio between the arch height and the arch width of at least six to four.

8. The system as claimed in claim 6 further comprising:

providing a base integrated circuit die;

attaching the die mounting surface of the arched pedestal integrated circuit die over the base integrated circuit die; and

wherein forming the arched pedestal integrated circuit die includes:

forming the pedestal portion smaller than the active surface of the arched pedestal integrated circuit die and smaller than the base integrated circuit die.

9. The system as claimed in claim 6 further comprising attaching electrical connectors between a package substrate and a base integrated circuit die, between the package substrate and the arched pedestal integrated circuit die, and wherein the arch guides an encapsulant around the electrical connectors.

10. The system as claimed in claim 6 further comprising:

providing an integrated circuit wafer;

applying a singulation apparatus having a rectangular blade and an arch blade with an elliptical or circular shape for one-step arch-formation and singulation of the arched pedestal integrated circuit die from the integrated circuit wafer.

11. An integrated circuit package system comprising:

an arched pedestal integrated circuit die including:

an active surface;

a die mounting surface;

a pedestal portion including:

an arch intersecting the die mounting surface and having an arch height; and

the arch under a portion of the active surface and having an arch width less than the arch height.

12. The system as claimed in claim 11 wherein the arched pedestal integrated circuit die includes a second, third, or fourth arch.

13. The system as claimed in claim 11 further comprising a base integrated circuit and wherein the pedestal portion is smaller than the base integrated circuit die.

14. The system as claimed in claim 11 further comprising electrical connectors between a package substrate and a base integrated circuit die, between the package substrate and the arched pedestal integrated circuit die, and an encapsulant between the arch and the electrical connectors.

15. The system as claimed in claim 11 further comprising an overhang edge adjacent the portion of the arch adjacent the active surface.

16. The system as claimed in claim 11 wherein:

the arched pedestal integrated circuit die includes:

the active surface with arched pedestal die pads adjacent at least one edge thereof;

the die mounting surface on the opposite side of the die from the active surface;

the pedestal portion including:

the arch intersecting the die mounting surface and having the arch height, and

the arch under a portion of the active surface and having the arch width less than the arch height, and

further comprising:

an overhang edge adjacent the portion of the arch adjacent the active surface.

17. The system as claimed in claim 16 wherein the arched pedestal integrated circuit die includes a second, third, or fourth arch with a ratio between the arch height and the arch width of at least six to four.

18. The system as claimed in claim 16 further comprising:

a base integrated circuit die; and

the die mounting surface of the arched pedestal integrated circuit die over the base integrated circuit die; and

wherein the arched pedestal integrated circuit die includes:

the pedestal portion smaller than the active surface of the arched pedestal integrated circuit die and smaller than the base integrated circuit die.

19. The system as claimed in claim 16 further comprising electrical connectors between a package substrate and a base integrated circuit die, between the package substrate and the arched pedestal integrated circuit die, and wherein the arch for guiding an encapsulant around the electrical connectors.

20. The system as claimed in claim 16 wherein the overhang edge adjacent the portion of the arch adjacent the active surface, includes a rectangular shape.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYING PARTY DATA FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC LTD. AND CORRECT THE NAME OF RECEIVING PARTY DATA FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED AT REEL: 64838 FRAME: 948. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 29, 2024
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 067534/0872 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0328 Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064838/0948 →
RELEASE OF SECURITY INTEREST Recorded Jun 15, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052935/0327 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0328 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2006
From: PARK, SOO-SAN
To: STATS CHIPPAC LTD.
Reel/Frame 018089/0849 →