SEMICONDUCTOR PACKAGE WIRE BONDING
A stacked die semiconductor package comprises a die coupled to a substrate, the first die having a die bonding area, a bonding wire supporting layer affixed to a top surface of the first die, and a bonding wire bonded to the die bonding area and to a substrate bonding area on the substrate, the bonding wire fixably attached to the bonding wire supporting layer.
1 . A semiconductor package, comprising:
a substrate having at least one bonding area;
a first die coupled to a top surface of the substrate, wherein the first die has at least one die bonding area;
a first bonding wire supporting layer affixed on a top surface of the first die; and
at least one bonding wire bonded to the at least one bonding area and the at least one die bonding area, wherein the at least one bonding wire is fixably attached to the first bonding wire supporting layer.
2 . The semiconductor package of claim 1 , wherein the first bonding wire supporting layer comprises a film.
3 . The semiconductor package of claim 1 , wherein the first bonding wire supporting layer comprises an epoxy.
4 . The semiconductor package of claim 1 , wherein the at least one bonding wire is a gold wire.
5 . The semiconductor package of claim 1 , further comprising a bump on the at least one bonding area, wherein the bump fixably couples the at least one bonding wire to the at least one bonding area.
6 . The semiconductor package of claim 1 , wherein the bonding wire has a tension between the first bonding wire supporting layer and the at least one bonding area.
7 . The semiconductor package of claim 1 , further comprising a second bonding wire supporting layer affixed on a top surface of the first bonding wire supporting layer.
8 . The semiconductor package of claim 7 , further comprising a second die affixed on a top surface of the second bonding wire supporting layer.
9 . The semiconductor package of claim 7 , wherein the second bonding wire supporting layer comprises a film.
10 . The semiconductor package of claim 7 , wherein the second bonding wire supporting layer comprises an epoxy.
11 . A method for making a semiconductor package, comprising:
providing a first integrated circuit chip having a top surface and at least one chip bonding area;
coupling the first integrated circuit chip to a top surface of a substrate having at least one substrate bonding area;
providing a first bonding wire supporting layer;
coupling the first bonding wire supporting layer to the top surface of the first integrated circuit chip;
providing a bonding wire;
coupling the bonding wire to the at least one chip bonding area on the first integrated circuit chip;
coupling the bonding wire to the at least one substrate bonding area on the substrate; and
affixing the bonding wire to the bonding wire supporting layer.
12 . The method of claim 11 , further comprising:
providing a second integrated circuit chip having a bottom surface and at least one chip bonding area;
providing a second bonding wire supporting layer having a top surface and a bottom surface;
coupling the bottom surface of the second integrated circuit chip to the top surface of the second bonding wire supporting layer; and
coupling the bottom surface of the second bonding wire supporting layer to the top surface of the first bonding wire supporting layer.
13 . The method of claim 1 further comprising:
identifying an area on the first bonding wire supporting layer to be cut out to provide clearance for the at least one chip bonding area on the first integrated circuit chip; and
cutting out the identified area on the first bonding wire supporting layer.
14 . The method of claim 12 , further comprising:
identifying an area on the first bonding wire supporting layer to be cut out to provide clearance for the at least one chip bonding area on the first integrated circuit chip;
cutting out the identified area on the first bonding wire supporting layer;
identifying an area on the second bonding wire supporting layer to be cut out to provide clearance for the at least one chip bonding area on the second integrated circuit chip; and
cutting out the identified area on the second bonding wire supporting layer.
15 . A semiconductor package made according to the method of claim 11 .
16 . The method of claim 15 , further comprising including the semiconductor package in a computer, personal digital assistant, digital camera, or cellular telephone.
17 . A stacked die semiconductor package, comprising:
a substrate;
a first die coupled to a top surface of the substrate;
a first bonding wire film affixed on top of the first die; and
a plurality of bonding wires electrically coupled to the first die and the substrate and also fixably attached to the first bonding wire film.
18 . The semiconductor package of claim 17 , further comprising:
a second die; and
a second bonding wire film affixed underneath the second die and on top of the first bonding wire film.
19 . The semiconductor package of claim 17 , further comprising:
a second die; and
a bonding wire epoxy affixed underneath the second die and on top of the first bonding wire film.
20 . The semiconductor package of claim 18 , further comprising:
a third die; and
a third bonding wire film affixed underneath the third die and on top of the second bonding wire film.