IP Library Granted Patent US 7,634,753
Granted Patent B2
US 7,634,753 · App. 11/745,134 · Granted Dec 15, 2009

System for signal routing line aggregation in a field-programmable gate array

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Quick Facts
Patent No.
US 7,634,753
App. No.
11/745,134
Granted
Dec 15, 2009
Kind
B2
Abstract

An aggregation interconnect scheme for a programmable logic device provides low-skew routing of high fan-out signals by aggregating regional routing resources, which provide low-skew routing utilizing under-utilized global routing resources.

Claims (13)

1. A method for routing a signal in a programmable logic device comprising:

providing a programmable logic device having a plurality of local routing lines and a plurality of high fan-out, low skew routing lines;

examining the programmable logic device to determine whether a set of high fan-out, low skew routing lines is available to route the signal;

if a set of high fan-out, low skew routing lines is available, programming an aggregation interconnect having equal path lengths to each of the set of high fan-out, low skew routing lines to provide a signal path for the signal; and

if a set of high fan-out, low skew routing lines is not available, programming interconnects to local routing lines to provide the signal path for the signal.

2. The method of claim 1 , wherein programming an aggregation interconnect having equal path lengths includes path lengths that include additional aggregation interconnects.

3. The method of claim 2 , wherein programming an aggregation interconnect having equal path lengths includes path lengths that include routing line driver circuits.

4. In a programmable logic device, a method for routing a selected high fan-out signal comprising:

providing a programmable logic device having a plurality of global routing lines, a plurality of regional routing lines and a plurality of local routing lines;

first routing other high fan-out signals that must drive greater numbers of loads than the selected high fan-out signal via global routing lines by programming the global routing lines to carry the other high fan-out signals;

if there is an available global routing line available for routing the selected high fan-out signal, routing the selected high fan-out signal via the available global routing line by programming the available global routing line to carry the selected high fan-out signal;

if there is not a global routing line available for routing the selected high fan-out signal, and if there are a plurality of regional routing lines that may be aggregated to route the selected high fan-out signal, routing the selected high fan-out signal via the plurality of regional routing lines by programming the pluraliw of regional routing lines to carry the selected high fan-out signal;

if there is not a global routing line available for routing the selected high fan-out signal, and if there are not a plurality of regional routing lines that may be aggregated to route the selected high fan-out signal, routing the selected high fan-out signal via local routing lines by programming the local routing lines to carry the selected high fan-out signal.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.), INC.; MICROSEMI FREQUENCY AND TIME CORPORATION; MICROSEMI COMMUNICATIONS, INC.; MICROSEMI SOC CORP.; MICROSEMI CORP. - POWER PRODUCTS GROUP; MICROSEMI CORP. - RF INTEGRATED SOLUTIONS
Reel/Frame 046251/0391 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC. (F/K/A LEGERITY, INC., ZARLINK SEMICONDUCTOR (V.N.) INC., CENTELLAX, INC., AND ZARLINK SEMICONDUCTOR (U.S.) INC.); MICROSEMI FREQUENCY AND TIME CORPORATION (F/K/A SYMMETRICON, INC.); MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION); MICROSEMI SOC CORP. (F/K/A ACTEL CORPORATION); MICROSEMI CORP. - POWER PRODUCTS GROUP (F/K/A ADVANCED POWER TECHNOLOGY INC.); MICROSEMI CORP. - RF INTEGRATED SOLUTIONS (F/K/A AML COMMUNICATIONS, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037691/0697 →
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
CHANGE OF NAME Recorded Dec 28, 2015
From: ACTEL CORPORATION
To: MICROSEMI SOC CORP.
Reel/Frame 037393/0572 →
NOTICE OF SUCCESSION OF AGENCY Recorded Apr 9, 2015
From: ROYAL BANK OF CANADA (AS SUCCESSOR TO MORGAN STANLEY & CO. LLC)
To: BANK OF AMERICA, N.A., AS SUCCESSOR AGENT
Reel/Frame 035657/0223 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2011
From: WHITE ELECTRONIC DESIGNS CORP.; ACTEL CORPORATION; MICROSEMI CORPORATION
To: MORGAN STANLEY & CO. INCORPORATED
Reel/Frame 025783/0613 →