Package-in-package using through-hole via die on saw streets

1. A method of making a semiconductor device, comprising:

providing a first semiconductor die having top, bottom, and peripheral side surfaces;

providing a bond pad formed over the top surface;

providing an organic material disposed around the peripheral side surface and extending from the top surface to the bottom surface of the first semiconductor die;

after providing the organic material, forming a via through the organic material from the top surface to the bottom surface of the first semiconductor die;

after forming the via, providing a conductive material deposited in the via to form a conductive through hole via (THV) extending from the top surface to the bottom surface of the first semiconductor die;

providing a metal trace electrically connecting the conductive THV to the bond pad;

providing a redistribution layer (RDL) having an interconnection pad disposed over the top surface of the first semiconductor die;

mounting a second semiconductor die to the first semiconductor die; and

depositing an encapsulant over the first and second semiconductor die to form a package-in-package (PiP) semiconductor device.

2. The method of claim 1 , further including electrically connecting the second semiconductor die to the first semiconductor die using a bond wire.

3. The method of claim 2 , further including providing an underfill material disposed between the first and second semiconductor die.

4. The method of claim 3 , further including providing a third semiconductor die attached to the second semiconductor die and wire-bonded to the conductive material.

5. A method of making a semiconductor device, comprising:

providing a first semiconductor die incorporating an organic material formed around a peripheral region of the first semiconductor die that extends from a top surface to a bottom surface of the first semiconductor die and a conductive through-hole via (THV) formed through the organic material, the first semiconductor die disposed over a substrate;

providing a second semiconductor die electrically connected to the conductive THV of the first semiconductor die; and

providing an encapsulant formed over the first and second semiconductor die to form a package-in-package (PiP) semiconductor device.

6. The method of claim 5 , wherein the second semiconductor die is a wire-bond die, which is wire-bonded to the conductive THV.

7. The method of claim 5 , wherein the second semiconductor die is wire-bonded to a bond pad which is coupled to the conductive THV.

8. The method of claim 5 , further including providing a redistribution layer (RDL) incorporating an interconnection pad formed over the top surface of the first semiconductor die, wherein the first and second semiconductor die are electrically connected through a bump coupled to the interconnection pad.

9. The method of claim 5 , further including providing an underfill material disposed between the first and second semiconductor die.

10. The method of claim 5 , further including providing a third semiconductor die, coupled to the second semiconductor die, and wire-bonded to the conductive THV.

11. The method of claim 5 , wherein the second semiconductor die is integrated into a leadframe package mounted to the first semiconductor die.

12. The method of claim 5 , wherein the second semiconductor die is integrated into an array package mounted to the first semiconductor die.

13. The method of claim 5 , wherein the second semiconductor die is integrated into an inverted top package mounted to the first semiconductor die.

14. The method of claim 13 , further including mounting a third semiconductor die to the inverted top package.

15. The method of claim 5 , wherein the second semiconductor die is integrated into an inverted bottom package disposed between the first semiconductor die and the substrate.

16. The method of claim 15 , further including providing a third semiconductor die incorporating a conductive THV disposed along a peripheral surface of the third semiconductor die, wherein the third semiconductor die is disposed adjacent to the first semiconductor die.

17. The method of claim 16 , further including providing an integrated passive device coupled to the conductive THV.

18. The method of claim 5 , further including:

providing a bond pad formed over the top surface;

providing a metal trace electrically connecting the conductive THV to the bond pad; and

providing a redistribution layer (RDL) including an interconnection pad disposed over the top surface of the first semiconductor die.

19. The method of claim 18 , further including electrically connecting the second semiconductor die to the first semiconductor die using a bump.

20. The method of claim 19 , further including providing an underfill material disposed between the first semiconductor die and the second semiconductor die.

21. The method of claim 20 , further including providing a third semiconductor die attached to the second semiconductor die and wire-bonded to the conductive material.

22. A method of making a semiconductor device, comprising:

providing a first semiconductor die;

forming a bond pad over a first surface of the first semiconductor die;

forming an organic material around a peripheral region of the first semiconductor die and extending from the first surface to a second surface of the first semiconductor die opposite the first surface;

forming a via through the organic material from the first surface to the second surface of the first semiconductor die;

forming a conductive material in the via to provide a conductive through hole via (THV) extending from the first surface to the second surface of the first semiconductor die;

forming a conductive trace over the first surface of the first semiconductor die electrically connected between the conductive THV and the bond pad;

mounting a second semiconductor die to the first semiconductor die; and

depositing a first encapsulant over the first and second semiconductor die to form a package-in-package (PiP) semiconductor device.

23. The method of claim 22 , further including forming a redistribution layer over the first surface of the first semiconductor die.

24. The method of claim 22 , further including electrically connecting the second semiconductor die to the first semiconductor die using a bond wire.

25. The method of claim 22 , further including depositing an underfill material between the first semiconductor die and the second semiconductor die.

26. The method of claim 22 , further including:

mounting a third semiconductor die to the second semiconductor die; and

electrically connecting the third semiconductor die to the first semiconductor die.

27. The method of claim 26 , wherein the third semiconductor die overhangs the second semiconductor die.

28. The method of claim 26 , further including depositing a second encapsulant over the third semiconductor die prior to depositing the first encapsulant.

29. The method of claim 22 , further including:

mounting a third semiconductor die to the first semiconductor die; and

electrically connecting the third semiconductor die to the first semiconductor die.

30. A method of making a semiconductor device, comprising:

providing a first semiconductor die;

forming an organic material around a peripheral region of the first semiconductor die, the organic material extending from a first surface of the first semiconductor die to a second surface of the first semiconductor die opposite the first surface;

forming a conductive via through the organic material;

mounting a second semiconductor die to the first semiconductor die; and

depositing a first encapsulant over the first and second semiconductor die to form a package-in-package (PiP) semiconductor device.

31. The method of claim 30 , further including:

forming a bond pad over the first surface of the first semiconductor die; and

forming a conductive trace over the first surface of the first semiconductor die electrically connected between the conductive via and the bond pad.

32. The method of claim 30 , further including forming a redistribution layer over the first surface of the first semiconductor die.

33. The method of claim 30 , further including electrically connecting the second semiconductor die to the first semiconductor die using a bump.

34. The method of claim 30 , further including depositing an underfill material between the first semiconductor die and the second semiconductor die.

35. The method of claim 30 , further including:

mounting a third semiconductor die to the second semiconductor die; and

electrically connecting the third semiconductor die to the second semiconductor die.

36. The method of claim 35 , wherein the third semiconductor die overhangs the second semiconductor die.

37. The method of claim 35 , further including depositing a second encapsulant over the third semiconductor die prior to depositing the first encapsulant.

38. The method of claim 30 , further including:

mounting a third semiconductor die to the first semiconductor die; and

electrically connecting the third semiconductor die to the second semiconductor die.