Integrated circuit with metal silicide regions
View Patent ↗A method for forming a metal silicide region in a silicon region of a semiconductor substrate. The method comprises forming a metal layer over the silicon region, then in succession forming a titanium and a titanium nitride layer thereover. As the substrate is heated to form the silicide, the titanium getters silicon dioxide on the surface of the silicon region and the titanium nitride promotes the formation of a smooth surface at the interface between the silicide layer and the underlying silicon region.
1. An integrated circuit comprising:
a substrate;
a cobalt silicide region consisting of a cobalt silicide layer adjacent the substrate; and
a titanium silicide layer formed from a titanium layer, the titanium silicide layer overlying the cobalt silicide wherein the titanium layer provides a silicon dioxide gettering material, and wherein the titanium silicide layer is thinner than the cobalt silicide layer.
2. The integrated circuit of claim 1 further comprising a conductive interconnect in contact with the cobalt silicide.
3. The integrated circuit of claim 1 wherein the substrate comprises a first device region selected from the group consisting of a source region selected from the group consisting of a source region and a drain region of a field effect transistor and the cobalt silicide layer is formed on the first device region.