IP Library Granted Patent US 7,892,072
Granted Patent B2
US 7,892,072 · App. 11/852,771 · Granted Feb 22, 2011

Method for directional grinding on backside of a semiconductor wafer

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Quick Facts
Patent No.
US 7,892,072
App. No.
11/852,771
Granted
Feb 22, 2011
Kind
B2
Abstract

A backside grinding apparatus removes semiconductor material from a surface of a semiconductor wafer. The wafer is mounted to a backing plate. The backside surface undergoes a first grinding operation in a rotational motion to remove excess semiconductor material. The semiconductor wafer is then aligned such that edges of the die are oriented along a reference line. The backside surface undergoes a second grinding operation in a linear direction on a 45-diagonal with respect to the reference line to create linear grind marks which are diagonal to the edges of the die. The linear grind marks are formed by an abrasive surface having at least 4000 mesh count. The second grinding operation removes the radial grind marks produced by the first grinding operation. The linear grind marks oriented diagonal with respect to the reference line increases the strength of the die to resist cracking.

Claims (31)

1. A method of removing semiconductor material from a surface of a semiconductor wafer, comprising:

mounting the semiconductor wafer to a backing plate, the semiconductor wafer having a plurality of die and a front surface with active devices formed thereon facing the backing plate and a backside surface facing opposite to the backing plate;

grinding the backside surface of the semiconductor wafer in a rotational motion to remove excess semiconductor material;

aligning the semiconductor wafer such that edges of the die are oriented along a reference line; and

grinding the backside surface of the semiconductor wafer in a linear direction diagonal to the reference line to create linear grind marks which are oriented diagonal to the edges of the die.

2. The method of claim 1 , further including forming the linear grind marks on a 45-degree diagonal with respect to the reference line.

3. The method of claim 1 , further including forming the linear grind marks with a cylinder having an abrasive surface.

4. The method of claim 1 , further including forming the linear grind marks with a wheel having an abrasive surface.

5. The method of claim 1 , further including forming the linear grind marks with an abrasive surface having at least 4000 mesh count.

6. The method of claim 1 , wherein the linear grind marks oriented on a diagonal with respect to the reference line increase the strength of the die to resist cracking.

7. The method of claim 1 , wherein the grinding removes semiconductor material to create a planar backside surface without polishing.

8. A method of removing semiconductor material from a backside surface of a semiconductor wafer, comprising:

mounting the semiconductor wafer to a backing plate, the semiconductor wafer having a plurality of die;

aligning the semiconductor wafer such that edges of the die are oriented along a reference line; and

grinding the backside surface of the semiconductor wafer in a linear direction diagonal to the reference line to create linear grind marks which are oriented diagonal to the edges of the die.

9. The method of claim 8 , further including grinding the backside surface of the semiconductor wafer in a rotational motion prior to grinding the backside surface in a linear direction diagonal to the reference line.

10. The method of claim 8 , further including forming the linear grind marks on a 45-degree diagonal with respect to the reference line.

11. The method of claim 8 , further including forming the linear grind marks with a cylinder having an abrasive surface.

12. The method of claim 8 , further including forming the linear grind marks with a wheel having an abrasive surface.

13. The method of claim 8 , further including forming the linear grind marks with an abrasive surface having at least 4000 mesh count.

14. A method of removing semiconductor material from a semiconductor wafer having a plurality of die, a front surface with active devices formed thereon, and a backside surface opposite the front surface, the method comprising:

grinding the backside surface using a rotational motion to remove excess semiconductor material;

after grinding the backside surface using the rotational motion, aligning the semiconductor wafer such that two edges of each die are oriented substantially parallel to a reference line; and

after aligning the semiconductor wafer, grinding the backside surface in a linear direction to form linear grind marks in the semiconductor wafer, the linear direction intersecting the reference line at an angle.

15. The method of claim 14 , wherein the angle is substantially 45 degrees.

16. The method of claim 14 , wherein grinding the backside surface comprises grinding such that all the linear grind marks on the wafer are substantially parallel.

17. A method of removing semiconductor material from a backside surface of a semiconductor wafer having a plurality of die, the method comprising:

aligning the semiconductor wafer such that two edges of each die are oriented along a reference line; and

grinding the backside surface of the semiconductor wafer in a linear direction that is at an angle relative to the reference line to create linear grind marks in the wafer, the linear grind marks oriented to the two edges of each die at the angle.

18. The method of claim 17 , wherein the angle is substantially 45 degrees.

19. The method of claim 17 , wherein grinding the backside surface comprises grinding such that all the linear grind marks on the wafer are substantially parallel.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVER SHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 064783 FRAME 0896. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE CHANGE OF NAME. Recorded Sep 22, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065015/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVERSHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 038378 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 14, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064962/0123 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0292) Recorded Aug 30, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE.LTE.
Reel/Frame 064783/0896 →
RELEASE OF SECURITY INTEREST Recorded Jun 12, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052924/0007 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0292 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2007
From: LEE, SUNGYOON; SHIN, JUNGHOON; YOON, BOHAN
To: STATS CHIPPAC, LTD.
Reel/Frame 019803/0892 →