IP Library Granted Patent US 8,138,591
Granted Patent B2
US 8,138,591 · App. 11/860,460 · Granted Mar 20, 2012

Integrated circuit package system with stacked die

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Quick Facts
Patent No.
US 8,138,591
App. No.
11/860,460
Granted
Mar 20, 2012
Kind
B2
Abstract

An integrated circuit package system comprising forming a trace frame including: fabricating a sacrificial substrate; forming a first series of bonding pads along a length of the sacrificial substrate; forming a second series of the bonding pads along a width of the sacrificial substrate; forming conductive traces for connecting the bonding pads of the first series to the bonding pads of the second series in a one to one correspondence; and removing the sacrificial substrate.

Claims (31)

1. A method of manufacturing an integrated circuit package system comprising forming a trace frame including:

fabricating a sacrificial substrate;

forming a first series of bonding pads along a length of the sacrificial substrate;

forming a second series of the bonding pads along a width of the sacrificial substrate;

forming conductive traces for connecting the bonding pads of the first series to the bonding pads of the second series in a one to one correspondence; and

removing the sacrificial substrate.

2. The method as claimed in claim 1 further comprising:

mounting a first integrated circuit die on the trace frame;

mounting a second integrated circuit die on the first integrated circuit die;

attaching first electrical interconnects between the first integrated circuit die and the first series of the bonding pads, second electrical interconnects between the second integrated circuit die and the second series of the bonding pads, or a combination thereof; and

molding an encapsulant on the first integrated circuit die, the second integrated circuit die, the electrical interconnects, the conductive traces, and the bonding pads.

3. The method as claimed in claim 1 wherein forming conductive traces including:

the conductive traces being generally parallel to each other; and

the conductive traces forming the shortest connection between the bonding pads of the first series and the second series.

4. The method as claimed in claim 1 further comprising forming a package substrate includes forming a rectangular digital package or a square digital package for mounting the trace frame, a first integrated circuit die, and a second integrated circuit die.

5. The method as claimed in claim 1 further comprising applying an encapsulant on a package substrate having the trace frame mounted thereon.

6. A method of manufacturing an integrated circuit package system comprising:

forming a first stacked die package and a second stacked die package each including:

forming a trace frame having a bonding pad,

mounting a first integrated circuit die over the trace frame,

mounting a second integrated circuit die over the first integrated circuit, and

coupling electrically the bonding pad on the trace frame to the first integrated circuit die, the second integrated circuit die, or a combination thereof;

forming a package substrate having a system bonding pad;

mounting the first stacked die package over the package substrate; and

mounting the second stacked die package over the first stacked die package.

7. The method as claimed in claim 6 further comprising coupling first electrical interconnects between the first stacked die package and the system bonding pad, and second electrical interconnects the second stacked die package and the system bonding pad.

8. The method as claimed in claim 6 further comprising forming a system contact on the package substrate including forming a via between the system bonding pad and the system contact.

9. The method as claimed in claim 6 wherein forming the package substrate includes forming a rectangular digital package or a square digital package including mounting the first stacked die package or the second stacked die package and coupling the first series of the bonding pad of the first stacked die package or the second series of the bonding pad of the second stacked die package to the system bonding pad.

10. The method as claimed in claim 6 wherein forming the first stacked die package or the second stacked die package each includes:

molding an encapsulant on the first integrated circuit die, the second integrated circuit die, the electrical interconnects, and the bonding pads; and

etching a sacrificial substrate from the trace frame for exposing a conductive trace.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0474 ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 8, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064842/0046 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38378 FRAME: 0280) Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064789/0474 →
RELEASE OF SECURITY INTEREST Recorded Jun 9, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052879/0852 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0280 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2007
From: YEE, JAE HAK; MYUNG, JUNWOO; JANG, BYOUNG WOOK
To: STATS CHIPPAC LTD.
Reel/Frame 019956/0147 →