Programmable logic device with a microcontroller-based control system
View Patent ↗A computer program product in a computer-readable medium for use in a microcontroller-based control system in a programmable logic integrated circuit device is disclosed. The computer program product comprises first instructions for initializing the device, second instructions for reading programming data from a data source external to the programmable logic integrated circuit device, third instructions for transferring the programming data into control elements internal to the programmable logic integrated circuit device. Provision is made for fourth instructions for saving at least a part of the internal logic state of the user logic programmed into the programmable logic integrated circuit device into a non-volatile memory block and for fifth instructions for restoring at least a part of the internal logic state of the user logic programmed into the programmable logic integrated circuit device from a non-volatile memory block. The programmable logic integrated circuit device, comprises a microcontroller block and a programmable logic block with programming circuitry, and has a sub-bus which couples the microcontroller block to the programming circuitry.
1. A programmable logic integrated circuit device, comprising:
a microcontroller block;
a programmable logic block comprising:
a programmable logic array comprising:
logic modules,
routing resources, and
programmable elements coupled to both the logic modules and the routing resources; and
programming circuitry coupled to the programmable elements;
a first sub-bus coupling the programming circuitry to the microcontroller block; and
a functional block comprising a static random access memory block coupled to the first sub-bus and the routing resources of the programmable logic array.
2. A programmable logic integrated circuit device, comprising:
a microcontroller block;
a programmable logic block comprising:
a programmable logic array comprising:
logic modules,
routing resources; and
programmable elements coupled to both the logic modules and the routing resources; and
programming circuitry coupled to the programmable elements;
a first sub-bus coupling the programming circuitry to the microcontroller block; and
a functional block comprising a non-volatile memory block is coupled to the first sub-bus and the routing resources of the programmable logic array.
3. A programmable logic integrated circuit device, comprising:
a microcontroller block;
a programmable logic block comprising:
a programmable logic array comprising:
logic modules,
routing resources, and
programmable elements coupled to both the logic modules and the routing resources; and
programming circuitry coupled to the programmable elements;
a first sub-bus coupling the programming circuitry to the microcontroller block;
a functional block comprising a static random access memory block coupled to the routing resources of the programmable logic array; and
a second sub-bus coupling the microcontroller block to the functional block.
4. A programmable logic integrated circuit device, comprising:
a microcontroller block;
a programmable logic block comprising:
a programmable logic array comprising:
logic modules,
routing resources, and
programmable elements coupled to both the logic modules and the routing resources; and
programming circuitry coupled to the programmable elements;
a first sub-bus coupling the programming circuitry to the microcontroller block;
a functional block comprising a non-volatile memory block coupled to the routing resources of the programmable logic array; and
a second sub-bus coupling the microcontroller block to the functional block.
5. A programmable logic integrated circuit device, comprising:
a microcontroller block;
a programmable logic block, comprising:
a programmable logic array comprising logic modules, routing resources and control elements, wherein the programmable elements are coupled to both the logic modules and the routing resources, and
programming circuitry coupled to the control elements and to the microcontroller block;
first and second functional blocks;
a data transfer block coupled to the microcontroller block;
a first sub-bus coupling the first functional block to the data transfer block; and
a second sub-bus coupling the second functional block to the data transfer block.
6. The programmable logic integrated circuit device of claim 5 , further comprising:
a third functional block coupled to the microcontroller block and the routing resources.
7. The programmable logic integrated circuit device of claim 5 , wherein:
the first functional block is coupled to the internal routing resources of the programmable logic array.
8. The programmable logic integrated circuit device of claim 7 , wherein:
the first functional block is a static random access memory block, and
the second functional block is a non-volatile memory block.