Semiconductor device and method of forming oxide layer on signal traces for electrical isolation in fine pitch bonding
View Patent ↗A semiconductor device has a semiconductor die with a solder bump formed on its surface. A contact pad is formed on a substrate. A signal trace is formed on the substrate. The pitch between the contact pad and signal trace is less than 150 micrometers. An electroless surface treatment is formed over the contact pad. The electroless surface treatment can include tin, ENIG, or OSP. A film layer is formed over the contact pad with an opening over the signal trace. An oxide layer is formed over the signal trace. The film layer and surface treatment prevent formation of the oxide layer over the contact pad. The film layer is removed. The solder bump is reflowed to metallurgically and electrically bond to the contact pad. In the event that the solder bump physically contacts the oxide layer, the oxide layer maintains electrical isolation between the solder bump and signal trace.
1. A method of making a semiconductor device, comprising:
providing a semiconductor die having a bump formed over a surface of the semiconductor die;
providing a substrate;
forming a contact pad on the substrate;
forming a signal trace on the substrate;
forming a mask over the signal trace with an opening over the contact pad;
forming a surface treatment over the contact pad after forming the mask;
removing the mask after forming the surface treatment;
forming a film layer over the contact pad with an opening over the signal trace after removing the mask;
selectively forming an oxide layer over the signal trace in the opening of the film layer, the film layer and surface treatment preventing formation of the oxide layer over the contact pad;
removing the film layer after forming the oxide layer; and
reflowing the bump to metallurgically and electrically bond to the contact pad, the oxide layer maintaining electrical isolation between the bump and signal trace in the event that the bump physically contacts the oxide layer over the signal trace.
2. The method of claim 1 , wherein the contact pad and signal trace have a pitch less than 150 micrometers.
3. The method of claim 1 , wherein forming the surface treatment includes immersing the contact pad in a solution of tin, electroless nickel immersion gold, or organic solderability preservative.
4. The method of claim 1 , wherein forming the oxide layer includes a cupric oxide layer.
5. The method of claim 1 , wherein forming the film layer includes a dry film or artwork film.
6. A method of making a semiconductor device, comprising:
providing a semiconductor die having a bump formed over a surface of the semiconductor die;
providing a substrate;
forming a contact pad on the substrate;
forming a signal trace on the substrate;
forming a surface treatment over the contact pad;
forming a first film layer over the contact pad with an opening over the signal trace;
selectively forming an insulating layer over the signal trace in the opening of the first film layer, the first film layer and surface treatment preventing formation of the insulating layer over the contact pad;
removing the first film layer; and
reflowing the bump to metallurgically and electrically bond to the contact pad.
7. The method of claim 6 , wherein forming the surface treatment includes:
forming a mask over the signal trace with an opening over the contact pad;
forming the surface treatment over the contact pad; and
removing the mask.
8. The method of claim 6 , wherein forming the surface treatment includes:
forming a second film layer over the signal trace with an opening over the contact pad;
forming the surface treatment over the contact pad; and
removing the second film layer.
9. The method of claim 6 , wherein the contact pad and signal trace have a pitch less than 150 micrometers.
10. The method of claim 6 , wherein forming the surface treatment includes immersing the contact pad in a solution of tin, electroless nickel immersion gold, or organic solderability preservative.
11. The method of claim 6 , wherein forming the oxide layer includes a cupric oxide layer.
12. The method of claim 6 , wherein forming the film layer includes a dry film or artwork film.
13. The method of claim 6 , wherein the oxide layer maintains electrical isolation between the bump and signal trace in the event that the bump physically contacts the oxide layer over the signal trace.
14. A method of making a semiconductor device, comprising:
providing a semiconductor die having a bump formed over a surface of the semiconductor die;
providing a substrate;
forming a contact pad on the substrate;
forming a signal trace on the substrate;
forming a surface treatment over the contact pad;
selectively forming an insulating layer over the signal trace only in an area of the signal trace adjacent to the contact pad; and
reflowing the bump to metallurgically and electrically bond to the contact pad, the oxide layer maintaining electrical isolation between the bump and signal trace in the event that the bump physically contacts the oxide layer over the signal trace.
15. The method of claim 14 , wherein forming the surface treatment includes:
forming a mask over the signal trace with an opening over the contact pad;
forming the surface treatment over the contact pad; and
removing the mask.
16. The method of claim 14 , wherein forming the surface treatment includes:
forming a first film layer over the signal trace with an opening over the contact pad;
forming the surface treatment over the contact pad; and
removing the first film layer.
17. The method of claim 14 , wherein forming the insulating includes:
forming a second film layer over the contact pad with an opening over the signal trace;
forming the insulating layer over the signal trace; and
removing the second film layer.
18. The method of claim 14 , wherein forming the insulating layer includes a cupric oxide layer.
19. The method of claim 14 , wherein the contact pad and signal trace have a pitch less than 150 micrometers.
20. The method of claim 14 , wherein forming the surface treatment includes immersing the contact pad in a solution of tin, electroless nickel immersion gold, or organic solderability preservative.
21. A semiconductor device, comprising:
a semiconductor die having a bump formed over a surface of the semiconductor die;
a substrate;
a contact pad formed on the substrate;
a signal trace formed on the substrate;
a surface treatment formed over the contact pad; and
an insulating layer selectively formed over the signal trace only in an area of the signal trace adjacent to the contact pad, wherein the bump is metallurgically and electrically bonded to the contact pad, the oxide layer maintaining electrical isolation between the bump and signal trace in the event that the bump physically contacts the oxide layer over the signal trace.
22. The semiconductor device of claim 21 , wherein the insulating layer includes a cupric oxide layer.
23. The semiconductor device of claim 21 , wherein the contact pad and signal trace have a pitch less than 150 micrometers.
24. The semiconductor device of claim 21 , wherein the surface treatment includes tin, electroless nickel immersion gold, or organic solderability preservative.
25. The semiconductor device of claim 21 , wherein the film layer includes a dry film or artwork film.