Integrated circuit package system for stackable devices
View Patent ↗An integrated circuit package system includes: providing a lower interposer substrate with lower exposed conductors; attaching a die over the lower interposer substrate; applying a stack encapsulant over the die and the lower interposer substrate having the lower exposed conductors partially exposed adjacent the stack encapsulant; and attaching an upper interposer substrate having upper exposed conductors over the stack encapsulant and with the upper exposed conductors substantially exposed.
1. A method for manufacturing an integrated circuit package system comprising:
providing a base substrate;
attaching a base die over the base substrate;
providing a lower interposer substrate with a lower inward surface and a lower outward surface having lower exposed conductors;
attaching a die over the lower inward surface of the lower interposer substrate;
applying a stack encapsulant over the die and the lower interposer substrate having the lower exposed conductors partially exposed near the lower inward surface and the lower outward surface;
attaching an upper interposer substrate having an upper inward surface and an upper outward surface with upper exposed conductors, the upper interposer substrate having a length less than a length of the lower interposer substrate and the upper inward surface in direct contact on the stack encapsulant with the upper exposed conductors substantially exposed near the upper outward surface; and
attaching the lower interposer substrate over the base die.
2. The method as claimed in claim 1 wherein providing the lower interposer substrate includes forming the lower interposer substrate with dimensions predetermined to provide the lower exposed conductors substantially exposed near the stack encapsulant.
3. The method as claimed in claim 1 further comprising connecting an external device to the upper outward surface of the upper interposer substrate.
4. The method as claimed in claim 1 further comprising providing a lower interposer substrate board for strip assembly.
5. An integrated circuit package system comprising:
a base substrate:
a base die over the base substrate;
a lower interposer substrate with a lower inward surface and a lower outward surface having lower exposed conductors, the lower interposer substrate over the base die;
a die over the lower inward surface of the lower interposer substrate;
a stack encapsulant over the die and the lower interposer substrate having the lower exposed conductors partially exposed near the lower inward surface and the lower outward surface; and
an upper interposer substrate having an upper inward surface and an upper outward surface with upper exposed conductors attached, the upper interposer substrate having a length less than a length of the lower interposer substrate and in direct contact on the stack encapsulant with the upper exposed conductors substantially exposed near the upper outward surface.
6. The system as claimed in claim 5 wherein the lower interposer substrate is formed to provide the lower exposed conductors substantially exposed near the stack encapsulant.
7. The system as claimed in claim 5 further comprising an interposer connector connected to the lower interposer substrate and the upper interposer substrate.
8. The system as claimed in claim 5 further comprising a second die attached over the lower interposer substrate.
9. The system as claimed in claim 5 further comprising package connectors over the upper exposed conductors of the upper interposer substrate.
10. The system as claimed in claim 5 wherein the lower interposer substrate includes dimensions predetermined to provide the lower exposed conductors substantially exposed near the stack encapsulant.
11. The system as claimed in claim 5 further comprising an external device connected to the upper outward surface of the upper interposer substrate.
12. The system as claimed in claim 5 further comprising a lower interposer substrate board for strip assembly.