INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REDISTRIBUTION

1 . An integrated circuit package system comprising:

forming a base package having a molded top;

providing a surface contact on the base package; and

patterning a redistribution layer on the molded top for coupling to the surface contact.

2 . The system as claimed in claim 1 further comprising providing an integrated circuit die in the base package for coupling to a stacked integrated circuit.

3 . The system as claimed in claim 1 wherein patterning the redistribution layer includes depositing a metal, on the molded top, by chemical vapor deposition.

4 . The system as claimed in claim 1 further comprising coupling a stacked integrated circuit to the redistribution layer includes coupling a wire bond integrated circuit, a flip chip integrated circuit, or a combination thereof.

5 . The system as claimed in claim 1 further comprising applying a laminate transposer on the base package.

6 . An integrated circuit package system comprising:

forming a base package having a molded top including forming a quad flat pack or a quad flat-pack no-lead package;

providing a surface contact on the base package including protruding a lead finger from the base package; and

patterning a redistribution layer on the molded top for coupling to the surface contact including forming a redistribution chip pad coupled to the surface contact.

7 . The system as claimed in claim 6 further comprising providing an integrated circuit die in the base package for coupling to a stacked integrated circuit including coupling a system contact, the integrated circuit die, the stacked integrated circuit, or a combination thereof.

8 . The system as claimed in claim 6 wherein patterning the redistribution layer includes depositing a metal, on the molded top, by chemical vapor deposition including depositing a copper, aluminum, or an alloy thereof.

9 . The system as claimed in claim 6 further comprising coupling a stacked integrated circuit to the redistribution layer includes coupling a wire bond integrated circuit, a flip chip integrated circuit, or a combination thereof including coupling a wafer level chip scale package on the redistribution layer.

10 . The system as claimed in claim 6 further comprising applying a laminate transposer on the base package including patterning a ball grid array package site, an integrated circuit attach site, a leaded package site, a shield, a discrete component site, or a combination thereof.

11 . An integrated circuit package system comprising:

a base package having a molded top;

a surface contact on the base package; and

a redistribution layer on the molded top for coupling to the surface contact.

12 . The system as claimed in claim 11 further comprising an integrated circuit die in the base package coupled to a stacked integrated circuit.

13 . The system as claimed in claim 11 wherein the redistribution layer includes a metal deposited on the molded top by chemical vapor deposition.

14 . The system as claimed in claim 11 further comprising a stacked integrated circuit coupled to redistribution layer includes a wire bond integrated circuit, a flip chip integrated circuit, or a combination thereof.

15 . The system as claimed in claim 11 further comprising a laminate transposer on the base package.

16 . The system as claimed in claim 11 further comprising:

a quad flat pack or quad flat-pack no-lead is the base package;

a lead finger protruded from the base package; and

a redistribution chip pad coupled to the surface contact.

17 . The system as claimed in claim 16 further comprising an integrated circuit die in the base package coupled to a stacked integrated circuit includes a system contact, the integrated circuit die, the stacked integrated circuit, or a combination thereof coupled.

18 . The system as claimed in claim 16 wherein the redistribution layer includes a metal, on the molded top, deposited by chemical vapor deposition includes copper, aluminum, or an alloy thereof deposited.

19 . The system as claimed in claim 16 further comprising a stacked integrated circuit coupled to the redistribution layer includes a wire bond integrated circuit, a flip chip integrated circuit, a wafer level chip scale package, or a combination thereof on the redistribution layer.

20 . The system as claimed in claim 16 further comprising a laminate transposer on the base package includes a ball grid array package site, an integrated circuit attach site, a leaded package site, a shield, a discrete component site, or a combination thereof patterned.