IP Library Granted Patent US 8,291,399
Granted Patent B2
US 8,291,399 · App. 12/056,064 · Granted Oct 16, 2012

Off-line program analysis and run-time instrumentation

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Quick Facts
Patent No.
US 8,291,399
App. No.
12/056,064
Granted
Oct 16, 2012
Kind
B2
Abstract

A technique is disclosed for determining off-line the number and location of instrumentation probes to be inserted into a program under testing, and subsequently instrumenting the program at run-time based on the off-line analysis. In accordance with the illustrative embodiment, an off-line analyzer first determines instrumentation locations for a program under test in accordance with a method called the Super Nested Block Method. After the instrumentation locations have been determined, a testing/monitoring tool executes the program and a run-time instrumenter in parallel. The run-time instrumenter accordingly inserts probes into the program, removes probes after they have been executed once, and generates and reports information about code coverage based on the probes.

Claims (43)

1. A non-transitory computer-readable medium having stored therein instructions which, when executed by a processor, cause the processor to perform a method comprising:

identifying, prior to execution of a program, a super nested block in a control-flow graph, the super nested block comprising a block of code in the program having a branching point;

marking only one branch of the branching point for probing to yield a first location, the first location comprising one of a single node and a second branching point;

expanding a second branch of the branching point to yield a second super nested block, the second super nested block comprising a second block of code in the program having a plurality of branches;

marking a node from the plurality of branches for probing to yield a second location comprising one of a single node and a second branching point; and

inserting a probe at the first location in the program and the second location in the program during execution of the program.

2. The non-transitory computer-readable medium of claim 1 , wherein the program is for a real-time system.

3. The non-transitory computer-readable medium of claim 1 , wherein the processor is also for executing the program.

4. The non-transitory computer-readable medium of claim 1 , wherein the processor is also for generating an output that characterizes code coverage by the execution of the program.

5. The non-transitory computer-readable medium of claim 1 wherein the processor is also for replacing code of the program with new code that performs at least one of saving values of registers, running the probe, restoring the values of registers, removing the probe after the probe has been run once, and restoring original code of the program.

6. A non-transitory computer-readable medium having stored therein instructions which, when executed by a processor, cause the processor to perform a method comprising:

receiving an input that specifies locations in a program for probing, wherein the locations are determined by:

identifying, prior to execution of the program, a super nested block in a control-flow graph, the super nested block comprising a block of code in the program having a branching point;

marking only one branch of the branching point for probing to yield a first location, the first location comprising one of a single node and a second branching point;

expanding a second branch of the branching point to yield a second super nested block, the second super nested block comprising a second block of code in the program having a plurality of branches;

marking a node from the plurality of branches for probing to yield a second location comprising one of a single node and a second branching point, wherein the locations comprise the first location and the second location; and

after receiving the input, executing the program and inserting a probe at the locations in the program.

7. The non-transitory computer-readable medium of claim 6 , wherein the program is for a real-time system.

8. The non-transitory computer-readable medium of claim 6 , wherein the processor is also for generating an output that characterizes code coverage by the execution of the program.

9. The non-transitory computer-readable medium of claim 6 , wherein the processor is also for replacing code of the program with new code that performs at least one of saving values of registers, running the probe, restoring the values of registers, removing the probe after the probe has been run once, and restoring original code of the program.

10. A system comprising:

a processor; and

a computer-readable medium having stored therein instructions which, when executed by the processor, cause the processor to perform a method comprising:

identifying, prior to execution of a program, a super nested block in a control-flow graph, the super nested block comprising a block of code in the program having a branching point;

marking only one branch of the branching point for probing to yield a first location, the first location comprising one of a single node and a second branching point;

expanding a second branch of the branching point to yield a second super nested block, the second super nested block comprising a second block of code in the program having a plurality of branches;

marking a node from the plurality of branches for probing to yield a second location comprising one of a single node and a second branching point; and

inserting a probe at the first location in the program and the second location in the program during execution of the program.

11. The system of claim 10 , wherein the program is for a real-time system.

12. The system of claim 10 , the computer-readable medium storing further instructions which, when executed by the processor, cause the processor to perform a method further comprising generating an output that characterizes code coverage by the execution of the program.

13. The system of claim 10 , the computer-readable medium storing further instructions which, when executed by the processor, cause the processor to perform a method further comprising replacing code of the program with new code that performs at least one of saving values of registers, running the probe, restoring the values of registers, removing the probe after the probe has been run once, and restoring original code of the program.

14. The system of claim 10 , the computer-readable medium storing further instructions which, when executed by the processor, cause the processor to perform a method further comprising executing the program and a run-time instrumenter in parallel.

15. The system of claim 10 , wherein the run-time instrumenter is based on source code that is in the same programming language as the program.

16. A method comprising:

identifying, prior to execution of a program, a super nested block in a control-flow graph, the super nested block comprising a block of code in the program having a branching point;

marking only one branch of the branching point for probing to yield a first location, the first location comprising one of a single node and a second branching point;

expanding a second branch of the branching point to yield a second super nested block, the second super nested block comprising a second block of code in the program having a plurality of branches;

marking a node from the plurality of branches for probing to yield a second location comprising one of a single node and a second branching point; and

inserting a probe at the first location in the program and the second location in the program during execution of the program.

17. The method of claim 16 , wherein the program is for a real-time system.

18. The method of claim 16 , further comprising executing the program after a determination of the first location in the program and the second location in the program.

19. The method of claim 16 , further comprising generating an output that characterizes code coverage by the execution of the program.

20. The method of claim 16 , further comprising replacing code of the program with new code that performs at least one of saving values of registers, running the probe, restoring the values of registers, removing the probe after the probe has been run once, and restoring original code of the program.

Assignments (21)
(SECURITY INTEREST) GRANTOR'S NAME CHANGE Recorded Sep 21, 2023
From: AVAYA INC.
To: AVAYA LLC
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To: AVAYA MANAGEMENT L.P.; AVAYA INC.; INTELLISIST, INC.; AVAYA INTEGRATED CABINET SOLUTIONS LLC
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RELEASE OF SECURITY INTEREST IN PATENTS AT REEL 45124/FRAME 0026 Recorded Apr 26, 2023
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INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Aug 5, 2022
From: AVAYA INC.; INTELLISIST, INC.; AVAYA MANAGEMENT L.P.; AVAYA CABINET SOLUTIONS LLC
To: WILMINGTON TRUST, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
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SECURITY INTEREST Recorded Sep 25, 2020
From: AVAYA INC.; AVAYA MANAGEMENT L.P.; INTELLISIST, INC.; AVAYA INTEGRATED CABINET SOLUTIONS LLC
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
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BANKRUPTCY COURT ORDER RELEASING ALL LIENS INCLUDING THE SECURITY INTEREST RECORDED AT REEL/FRAME 030083/0639 Recorded Dec 15, 2017
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To: AVAYA INC.
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BANKRUPTCY COURT ORDER RELEASING ALL LIENS INCLUDING THE SECURITY INTEREST RECORDED AT REEL/FRAME 025863/0535 Recorded Dec 15, 2017
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BANKRUPTCY COURT ORDER RELEASING ALL LIENS INCLUDING THE SECURITY INTEREST RECORDED AT REEL/FRAME 041576/0001 Recorded Dec 15, 2017
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BANKRUPTCY COURT ORDER RELEASING ALL LIENS INCLUDING THE SECURITY INTEREST RECORDED AT REEL/FRAME 029608/0256 Recorded Dec 15, 2017
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