IP Library Granted Patent US 7,964,450
Granted Patent B2
US 7,964,450 · App. 12/126,548 · Granted Jun 21, 2011

Wirebondless wafer level package with plated bumps and interconnects

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,964,450
App. No.
12/126,548
Granted
Jun 21, 2011
Kind
B2
Abstract

A semiconductor package includes a carrier strip having a die cavity and a plurality of bump cavities. A semiconductor die is mounted in the die cavity of the carrier strip using a die attach adhesive. In one embodiment, a top surface of the semiconductor die is approximately coplanar with a top surface of the carrier strip proximate to the die cavity. Underfill material is deposited into the die cavity between the semiconductor die and a surface of the die cavity. In one embodiment, a passivation layer is deposited over the semiconductor die, and a portion of the passivation layer is etched to expose a contact pad of the semiconductor die. A metal layer is deposited over the package. The metal layer forms a package bump and a plated interconnect between the package bump and the contact pad of the semiconductor die. Encapsulant is deposited over the semiconductor package.

Claims (75)

1. A method of making a semiconductor package, comprising:

providing a carrier strip having a die cavity and a plurality of bump cavities;

mounting a first semiconductor die in the die cavity of the carrier strip using a die attach adhesive, a top surface of the first semiconductor die being approximately coplanar with a top surface of the carrier strip proximate to the die cavity;

depositing underfill into the die cavity between the first semiconductor die and a surface of the die cavity;

forming a passivation layer over the first semiconductor die;

removing a portion of the passivation layer to expose a contact pad of the first semiconductor die;

forming a metal layer over the carrier strip to form a package bump and a plated interconnect between the package bump and the contact pad of the first semiconductor die;

depositing encapsulant over the carrier strip; and

removing the carrier strip.

2. The method of claim 1 , including:

depositing a solder material over the package bump; and

reflowing the solder material to form a solder bump.

3. The method of claim 1 , including:

mounting a second semiconductor die over the first semiconductor die using an adhesive; and

forming a wirebond between a contact pad of the second semiconductor die and the package bump.

4. The method of claim 1 , wherein the metal layer includes a plurality of layers of conductive material.

5. The method of claim 1 , wherein the package bump and the contact pad of the first semiconductor die are connected by a single layer of conductive material. Zone Name: a 4 ,AMD

6. The method of claim 1 , wherein removing the portion of the passivation layer includes depositing a layer of photoresist over the passivation layer.

7. The method of claim 1 , including depositing a second passivation layer over the semiconductor package.

8. The method of claim 1 , wherein forming the metal layer over the carrier strip includes forming a redistribution layer (RDL).

9. A method of making a semiconductor package, comprising:

providing a substrate having a die cavity and a plurality of bump cavities;

mounting a semiconductor die in the die cavity of the substrate, a top surface of the semiconductor die being approximately coplanar with a top surface of the substrate proximate to the die cavity;

forming a metal layer into one of the plurality of bump cavities of the substrate to form a package bump;

connecting the package bump and a contact pad of the semiconductor die;

forming encapsulant over the semiconductor package; and

removing the substrate.

10. The method of claim 9 , including depositing underfill into the die cavity between the semiconductor die and a surface of the die cavity.

11. The method of claim 9 , wherein connecting the package bump and the contact pad of the semiconductor die includes forming a redistribution layer (RDL) over the semiconductor package.

12. The method of claim 9 , including:

depositing a solder material over the package bump; and

reflowing the solder material to form a solder bump.

13. The method of claim 9 , wherein the metal layer includes a plurality of layers of conductive material.

14. The method of claim 9 , including:

forming a passivation layer over the semiconductor die; and

removing a portion of the passivation layer to expose the contact pad of the semiconductor die.

15. The method of claim 14 , including depositing a second passivation layer over the semiconductor package.

16. The method of claim 9 , wherein connecting the package bump and the contact pad of the semiconductor die includes forming a wirebond between the package bump and the contact pad of the semiconductor die.

17. The method of claim 9 , wherein connecting the package bump and the contact pad of the semiconductor die includes forming a plated interconnect between the package bump and the contact pad of the semiconductor die.

18. The method of claim 9 , wherein the package bump and the contact pad of the semiconductor die are connected by a single layer of conductive material.

19. The method of claim 9 , wherein mounting the semiconductor die in the die cavity of the substrate includes using a die attach adhesive.

20. A method of making a semiconductor package, comprising:

providing a substrate having a die cavity and a bump cavity;

mounting a semiconductor die in the die cavity of the substrate;

forming a metal layer over the substrate to form a package bump and an interconnect between the package bump and a contact pad of the semiconductor die;

depositing encapsulant over the semiconductor package; and

removing the substrate.

21. The method of claim 20 , including depositing underfill into the die cavity between the semiconductor die and a surface of the die cavity.

22. The method of claim 18 , including:

forming a passivation layer over the semiconductor die; and

removing a portion of the passivation layer to expose the contact pad of the semiconductor die.

23. The method of claim 20 , wherein the metal layer includes a plurality of layers of conductive material.

24. The method of claim 20 , including:

depositing a solder material over the package bump; and

reflowing the solder material to form a solder bump.

25. The method of claim 20 , wherein the package bump and the contact pad of the semiconductor die are connected by a single layer of conductive material.

26. The method of claim 20 , wherein forming the metal layer over the substrate includes forming a redistribution layer (RDL).

27. The method of claim 20 , wherein mounting the semiconductor die in the die cavity of the substrate includes using a die attach adhesive.

28. The method of claim 20 , wherein mounting the semiconductor die in the die cavity of the substrate includes a top surface of the semiconductor die being approximately coplanar with a top surface of the substrate proximate to the die cavity.

29. A method of making a semiconductor package, comprising:

providing a substrate having a die cavity and a bump cavity;

mounting a semiconductor die in the die cavity of the substrate, a top surface of the semiconductor die being approximately coplanar with a top surface of the substrate;

forming a metal layer in the bump cavity of the substrate to form a package bump;

connecting the package bump and a contact pad of the semiconductor die;

depositing encapsulant over the semiconductor package; and

removing the substrate.

30. The method of claim 29 , wherein mounting the semiconductor die in the die cavity of the substrate includes using a die attach adhesive.

31. The method of claim 29 , wherein the top surface of the semiconductor die is approximately coplanar with the top surface of the substrate proximate to the die cavity.

32. The method of claim 29 , including depositing underfill into the die cavity between the semiconductor die and a surface of the die cavity.

33. The method of claim 29 , including:

forming a passivation layer over the semiconductor die; and

removing a portion of the passivation layer to expose the contact pad of the semiconductor die.

34. The method of claim 29 , wherein connecting the package bump and a contact pad of the semiconductor die includes forming a redistribution layer (RDL) over the substrate.

35. The method of claim 29 , wherein the package bump and the contact pad of the semiconductor die are connected by a single layer of conductive material.

36. The method of claim 29 , wherein connecting the package bump and the contact pad of the semiconductor die includes forming a plated interconnect between the package bump and the contact pad of the semiconductor die.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVER SHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 064783 FRAME 0896. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE CHANGE OF NAME. Recorded Sep 22, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065015/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVERSHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 038378 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 14, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064962/0123 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0292) Recorded Aug 30, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE.LTE.
Reel/Frame 064783/0896 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0292 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2008
From: CAMACHO, ZIGMUND R.; MERILO, DIOSCORO A.; TAY, LIONEL CHIEN HUI; CAPARAS, JOSE A.
To: STATS CHIPPAC, LTD.
Reel/Frame 020996/0279 →