IP Library Granted Patent US 8,137,995
Granted Patent B2
US 8,137,995 · App. 12/332,799 · Granted Mar 20, 2012

Double-sided semiconductor device and method of forming top-side and bottom-side interconnect structures

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Quick Facts
Patent No.
US 8,137,995
App. No.
12/332,799
Granted
Mar 20, 2012
Kind
B2
Abstract

A semiconductor device is made by forming a first active device on a first side of a semiconductor wafer. A first insulating layer is formed over the first side of the wafer. A first conductive layer is formed over the first insulating layer. A first interconnect structure is formed over the first insulating layer and first conductive layer. A temporary carrier is mounted to the first interconnect structure. A second active device is formed on a second side of the semiconductor wafer. A second insulating layer is formed over the second side of the wafer. A second conductive layer is formed over the second insulating layer. A second interconnect structure is formed over the second insulating layer and second conductive layer. The temporary carrier is removed, leaving a double-sided semiconductor device. The double-sided semiconductor device is enclosed in a package with the first and second interconnect structures electrically connected.

Claims (83)

1. A method of manufacturing a semiconductor device having a first active device, comprising:

providing a semiconductor wafer;

forming a first active device on a first side of the semiconductor wafer;

forming a first insulating layer over the first side of the semiconductor wafer;

forming a first conductive layer over the first insulating layer;

forming a first interconnect structure over the first insulating layer and first conductive layer, the first interconnect structure being electrically connected to the first active device through the first conductive layer;

mounting a pre-fabricated temporary carrier to the first interconnect structure;

after mounting the pre-fabricated temporary carrier, performing a chemical-mechanical polishing (CMP) process on a second side of the semiconductor wafer opposite the first side of the semiconductor wafer;

forming a second active device on a second side of the semiconductor wafer;

forming a second insulating layer over the second side of the semiconductor wafer;

forming a second conductive layer over the second insulating layer;

forming a second interconnect structure over the second insulating layer and second conductive layer, the second interconnect structure being electrically connected to the second active device through the second conductive layer;

forming a third insulating layer over the second interconnect structure; and

removing the pre-fabricated temporary carrier.

2. The method of claim 1 , wherein the first active device includes a bipolar transistor having a base region, emitter region, and collector region.

3. The method of claim 1 , further including:

forming an under bump metallization layer over the third insulating layer, the under bump metallization layer being electrically connected to the second interconnect structure; and

forming an electrical interconnect over the under bump metallization layer.

4. The method of claim 1 , further including:

forming a fourth insulating layer over the first interconnect structure; and

forming a third conductive layer over the fourth insulating layer, the third conductive layer being electrically connected to the first interconnect structure.

5. The method of claim 4 , further including:

providing a substrate having an interconnect structure;

mounting the semiconductor device to the substrate;

electrically connecting the third conductive layer to the interconnect structure of the substrate; and

forming an encapsulant over the semiconductor device and substrate.

6. The method of claim 1 , further including:

forming a through silicon via (THV) in the semiconductor wafer; and

filling the THV with conductive material.

7. The method of claim 6 , further including:

providing a substrate having an interconnect structure;

mounting the semiconductor device to the substrate; and

electrically connecting the first and second interconnect structures to the interconnect structure of the substrate through the THV.

8. A method of manufacturing a semiconductor device having a first active device, comprising:

providing a semiconductor wafer;

forming a first active device on a first side of the semiconductor wafer;

forming a first interconnect structure over the first side of the semiconductor wafer, the first interconnect structure being electrically connected to the first active device;

mounting a temporary carrier to the first interconnect structure;

forming a second active device on a second side of the semiconductor wafer opposite the first side of the semiconductor wafer;

forming a second interconnect structure over the second side of the semiconductor wafer, the second interconnect structure being electrically connected to the second active device;

removing the temporary carrier;

forming a first insulating layer over the first side of the semiconductor wafer; and

forming a first conductive layer over the first insulating layer, the first conductive layer being electrically connected to the first interconnect structure.

9. The method of claim 8 , wherein the first active device includes a bipolar transistor having a base region, emitter region, and collector region.

10. The method of claim 8 , wherein forming the first interconnect structure includes:

forming a third insulating layer;

forming a third conductive layer over the third insulating layer.

11. The method of claim 8 , further including:

providing a substrate having an interconnect structure;

mounting the semiconductor device to the substrate;

electrically connecting the first interconnect structure to the interconnect structure of the substrate; and

forming an encapsulant over the semiconductor device and substrate.

12. The method of claim 8 , further including:

forming a through silicon via (THV) in the semiconductor wafer; and

filling the THV with conductive material.

13. The method of claim 12 , further including:

providing a substrate having an interconnect structure;

mounting the semiconductor device to the substrate; and

electrically connecting the first and second interconnect structures to the interconnect structure of the substrate through the THV.

14. A method of manufacturing a semiconductor device having a first active device, comprising:

providing a semiconductor wafer;

forming a first active device on a first side of the semiconductor wafer;

forming a first interconnect structure over the first side of the semiconductor wafer, the first interconnect structure being electrically connected to the first active device;

forming a second active device on a second side of the semiconductor wafer opposite the first side of the semiconductor wafer;

forming a second interconnect structure over the second side of the semiconductor wafer, the second interconnect structure being electrically connected to the second active device.

forming a first insulating layer over the first side of the semiconductor wafer; and

forming a first conductive layer over the first insulating layer, the first conductive layer being electrically connected to the first active device.

15. The method of claim 14 , wherein the first active device includes a bipolar transistor having a base region, emitter region, and collector region.

16. The method of claim 14 , further including:

providing a substrate having an interconnect structure;

mounting the semiconductor device to the substrate;

electrically connecting the first interconnect structure to the interconnect structure of the substrate; and

forming an encapsulant over the semiconductor device and substrate.

17. The method of claim 14 , further including:

forming a through silicon via (THV) in the semiconductor wafer; and

filling the THV with conductive material.

18. The method of claim 17 , further including:

providing a substrate having an interconnect structure;

mounting the semiconductor device to the substrate; and

electrically connecting the first and second interconnect structures to the interconnect structure of the substrate through the THV.

19. The method of claim 1 , wherein mounting the pre-fabricated temporary carrier comprises attaching the pre-fabricated temporary carrier to the first interconnect structure using an adhesive layer.

20. The method of claim 8 , wherein mounting the temporary carrier comprises mounting a pre-fabricated, rigid material to the first interconnect structure.

21. The method of claim 14 , further comprising attaching a rigid material to the first interconnect structure using an adhesive layer.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0474 ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 8, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064842/0046 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38378 FRAME: 0280) Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064789/0474 →
RELEASE OF SECURITY INTEREST Recorded Jun 9, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052879/0852 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0280 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2008
From: KIM, OHHAN; PARK, JOUNGUN; KIM, SUNMI
To: STATS CHIPPAC, LTD.
Reel/Frame 021966/0017 →