Integrated circuit packaging system having through silicon via with direct interconnects and method of manufacture thereof

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a through silicon via die having an interconnect through a silicon substrate;

depositing a re-distribution layer on the through silicon via die and connected to the interconnects;

mounting an integrated circuit die over a center portion of the through silicon via die and the integrated circuit die does not extend horizontally past edges of the through silicon via die;

mounting a structure over the through silicon via die;

connecting the structure to the interconnect of the through silicon via die with a direct interconnect horizontally peripheral to the integrated circuit die and without extending horizontally past the edges of the through silicon via die; and

encapsulating the through silicon via die and partially encapsulating the structure with an encapsulation.

2. The method as claimed in claim 1 further comprising: encapsulating the direct interconnect with the encapsulation.

3. The method as claimed in claim 1 further comprising: connecting an integrated circuit die below the through silicon via die.

4. The method as claimed in claim 1 further comprising:

mounting an inner stacking module between the structure and the through silicon via die.

5. The method as claimed in claim 1 further comprising:

encapsulating the direct interconnect with an inner stacking module encapsulation.

6. A method of manufacture of an integrated circuit packaging system comprising:

providing a through silicon via die having an interconnect through a silicon substrate;

depositing a re-distribution layer on the through silicon via die and connected to the interconnects;

mounting a structure over the through silicon via die;

mounting an integrated circuit die between the structure and the through silicon via die and over a center portion of the through silicon via die and the integrated circuit die does not extend horizontally past edges of the through silicon via die;

connecting the structure to the interconnect of the through silicon via die with a direct interconnect horizontally peripheral to the integrated circuit die and without extending horizontally past the edges of the through silicon via die;

encapsulating the through silicon via die and partially encapsulating the structure with an encapsulation; and

connecting the integrated circuit die to the through silicon via die or the structure with an internal interconnect.

7. The method as claimed in claim 6 wherein:

mounting the structure includes mounting a structure having an over-hang; and

connecting the through silicon via die includes connecting the through silicon via die to the structure below the over-hang.

8. The method as claimed in claim 6 further comprising:

forming a top surface on the encapsulation level with structure.

9. The method as claimed in claim 6 wherein:

mounting the structure includes mounting an inner stacking module interposer or an interposer.

10. The method as claimed in claim 6 further comprising:

mounting an external package above the structure; and

connecting the external package to the structure with an external interconnect.

11. An integrated circuit packaging system comprising:

a through silicon via die having an interconnect through a silicon substrate;

a re-distribution layer deposited on the through silicon via die and connected to the interconnects;

an integrated circuit die mounted over a center portion of the through silicon via die and the integrated circuit die does not extend horizontally past edges of the through silicon via die;

a structure mounted over the through silicon via die;

a direct interconnect horizontally peripheral to the integrated circuit die mounted over the center portion of the through silicon via die and that connects the structure to the interconnect of the through silicon via die without extending horizontally past the edges of the through silicon via die; and

an encapsulation that encapsulates the through silicon via die and partially encapsulating the structure.

12. The system as claimed in claim 11 wherein:

the direct interconnect is encapsulated by the encapsulation.

13. The system as claimed in claim 11 further comprising:

an integrated circuit die connected below the through silicon via die.

14. The system as claimed in claim 11 further comprising:

an inner stacking module mounted between the structure and the through silicon via die.

15. The system as claimed in claim 11 further comprising:

an inner stacking module encapsulation that encapsulates the direct interconnect.

16. The system as claimed in claim 11 wherein:

the integrated circuit die is mounted between the structure and the through silicon via die; and

further comprising:

an internal interconnect that connects the integrated circuit die to the through silicon via die or the structure.

17. The system as claimed in claim 16 wherein:

the structure includes an over-hang; and

the through silicon via die is connected to the structure below the over-hang.

18. The system as claimed in claim 16 further comprising:

a top surface on the encapsulation level with structure.

19. The system as claimed in claim 16 wherein:

the structure is an inner stacking module interposer or an interposer.

20. The system as claimed in claim 16 further comprising:

an external package mounted above the structure; and

wherein:

the external package is connected to the structure with an external interconnect.