IP Library Granted Patent US 7,741,726
Granted Patent B2
US 7,741,726 · App. 12/336,141 · Granted Jun 22, 2010

Integrated circuit underfill package system

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Quick Facts
Patent No.
US 7,741,726
App. No.
12/336,141
Granted
Jun 22, 2010
Kind
B2
Abstract

An integrated circuit underfill package system including providing a substrate having a dispense port, attaching a first integrated circuit die on the substrate, and supplying an underfill to the dispense port when the substrate and the first integrated circuit die are inverted.

Claims (23)

1. An integrated circuit underfill package system comprising:

a substrate having a dispense port;

a first integrated circuit die on the substrate;

an underfill to the dispense port and between the substrate and the first integrated circuit die, the underfill covers portions of a side of the first integrated circuit die and leaves a surface of the first integrated circuit die uncovered; and

a second integrated circuit die over the first integrated circuit die, and the underfill does not fill a space directly under the second integrated circuit die and the first integrated circuit die.

2. The system as claimed in claim 1 further comprising:

the second integrated circuit die over the first integrated circuit die; and

the underfill fills a space between the second integrated circuit die and the substrate.

3. The system as claimed in claim 1 wherein the underfill comprises an overflow of the underfill on a sidewall of the first integrated circuit die.

4. The system as claimed in claim 1 wherein the substrate has electrical connections encapsulated by the underfill

5. The system as claimed in claim 1 wherein:

the substrate has first electrical connections and second electrical connections;

the first integrated circuit die has first electrical connectors connected to the first electrical connections positioned around the dispense port; and

the underfill is cured between the substrate and the first integrated circuit die.

6. The system as claimed in claim 5 wherein the substrate comprises:

a mounting surface with the first electrical connections and the second electrical connections; and

an interconnect surface for electrical interconnects.

7. The system as claimed in claim 5 wherein:

the first integrated circuit die comprises a flipchip having solder bumps attached to the first electrical connections.

8. The system as claimed in claim 5 wherein:

the underfill fills a predetermined space between the overflow and second electrical connections and is on a sidewall of the first integrated circuit die.

9. The system as claimed in claim 5 wherein:

the underfill is cured between the first integrated circuit die and the second electrical connections and on a sidewall of the first integrated circuit die.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYING PARTY DATA FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC LTD. AND CORRECT THE NAME OF RECEIVING PARTY DATA FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED AT REEL: 64838 FRAME: 948. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 29, 2024
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 067534/0872 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0328 Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064838/0948 →
RELEASE OF SECURITY INTEREST Recorded Jun 15, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052935/0327 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0328 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →