Programmable logic device with programmable wakeup pins
View Patent ↗A programmable logic device (PLD) adapted to enter a low-power or sleep mode with programmable wakeup pins in a wakeup group of pins is disclosed. Wake on a single pin change, wake on vector, and wake on a single pin transition are supported. The approach is to select the actively participating pins, enable the desired operation, define the wakeup condition, enter sleep mode, monitor the external signals coupled to the active pins, and exit sleep mode when the wakeup condition is detected.
1. A programmable logic integrated circuit device adapted to enter a low-power mode, the device comprising:
(a) a programmable logic core;
(b) a power control circuit coupled to the programmable logic core;
(c) a plurality of wakeup group inputs; and
(d) a wakeup control logic circuit coupled to the power control circuit, further comprising:
(i) a plurality of comparator circuits each coupled to a single wakeup group input,
(ii) a plurality of wakeup condition circuits each coupled to a single comparator circuit,
(iii) an activation circuit coupled to the comparator circuit; and
(iv) an evaluation circuit coupled to the comparator circuits and the power control circuit.
2. The programmable logic integrated circuit device according to claim 1 , further comprising a low-power mode control input coupled to the power control circuit, wherein:
(a) the device will enter the low-power mode in response to an external signal transmitted through the low-power mode control input and received in the power control circuit; and
(b) the device will exit the low-power mode in response to an external signal transmitted through at least one wakeup group input and received in the power control circuit.
3. The programmable logic integrated circuit device according to claim 2 , wherein each wakeup group input can be selected to actively participate in the wakeup function.
4. The programmable logic integrated circuit device according to claim 3 , wherein: the device exits the low-power mode in response to a specified pattern of external signals applied to the actively participating wakeup group inputs.
5. The programmable logic integrated circuit device according to claim 2 , wherein: the device will exit the low-power mode in response to a specified pattern of external signals being present at all of the wakeup group inputs.
6. The programmable logic integrated circuit device according to claim 1 , wherein: the device exits the low-power mode in response to a specified pattern of external signals applied to the wakeup group inputs.
7. A method of power management in a programmable logic integrated circuit device adapted to enter a low-power mode, the device having (i) a plurality of wakeup group inputs, (ii) circuitry supporting at least one wakeup operation, and (iii) circuitry for storing a wakeup condition, the method comprising:
(a) programmably specifying a wakeup operation;
(b) programmably defining the wakeup condition;
(c) entering the device into the low-power mode;
(d) monitoring external signals applied to the wakeup group inputs;
(e) evaluating each change of state of each external signal being monitored;
(f) filtering any possible positive evaluations resulting from activity on an inactive wakeup group input; and
(g) exiting the device from the low-power mode when the wakeup condition is detected.
8. The method of claim 7 , wherein at least one of the wakeup group inputs is selectively active, the method further comprising the step of programmably selecting the active wakeup group inputs.
9. The method of claim 8 , wherein the wakeup condition is a change in state of a single actively participating wakeup group input.
10. The method of claim 8 , wherein the wakeup condition is a specified pattern present at all of the actively participating wakeup group inputs.
11. The method of claim 8 , wherein the wakeup condition is a transition in a specified direction at the input of a single actively participating wakeup group input.
12. The method of claim 7 , wherein the wakeup condition is a change in state of a single actively participating wakeup group input.
13. The method of claim 7 , wherein the wakeup condition is a specified pattern present at all of the actively participating wakeup group inputs.
14. The method of claim 7 , wherein the wakeup condition is a transition in a specified direction at the input of a single actively participating wakeup group input.