Semiconductor device and method of integrating balun and RF coupler on a common substrate
View Patent ↗A semiconductor die has an RF coupler and balun integrated on a common substrate. The RF coupler includes first and second conductive traces formed in close proximity. The RF coupler further includes a resistor. The balun includes a primary coil and two secondary coils. A first capacitor is coupled between first and second terminals of the semiconductor die. A second capacitor is coupled between a third terminal of the semiconductor die and a ground terminal. A third capacitor is coupled between a fourth terminal of the semiconductor die and the ground terminal. A fourth capacitor is coupled between the high side and low side of the primary coil. The integration of the RF coupler and balun on the common substrate offers flexible coupling strength and signal directivity, and further improves electrical performance due to short lead lengths, reduces form factor, and increases manufacturing yield.
1. A semiconductor die, comprising:
a substrate;
a first integrated passive device (IPD) formed over the substrate, the first IPD including,
(a) a first conductive trace having a first terminal coupled to a first terminal of the semiconductor die,
(b) a second conductive trace having a first terminal coupled to a second terminal of the semiconductor die, the second conductive trace being formed in proximity to the first conductive trace, and
(c) a resistor coupled between a second terminal of the second conductive trace and a ground terminal; and
a second IPD formed over the substrate, the second IPD including,
(d) a first inductor having a first terminal coupled to a second terminal of the first conductive trace and a second terminal coupled to the ground terminal,
(e) a second inductor having a first terminal coupled to a third terminal of the semiconductor die and a second terminal coupled to the ground terminal, and
(f) a third inductor having a first terminal coupled to a fourth terminal of the semiconductor die and a second terminal coupled to the ground terminal, the first inductor being formed in proximity to the second and third inductors.
2. The semiconductor die of claim 1 , wherein the first, second, and third inductors operate as a balun.
3. The semiconductor die of claim 1 , further including a capacitive component coupled between the first and second terminals of the semiconductor die.
4. The semiconductor die of claim 3 , wherein the capacitor component includes first and second capacitors connected in series.
5. The semiconductor die of claim 1 , further including:
a first capacitor coupled between the third terminal of the semiconductor die and ground terminal;
a second capacitor coupled between the fourth terminal of the semiconductor die and ground terminal; and
a third capacitor coupled between the first and second terminals of the first inductor.
6. A semiconductor die, comprising:
a substrate;
a first integrated passive device (IPD) formed over the substrate, the first IPD including,
(a) a first conductive trace having a first terminal coupled to a ground terminal,
(b) a second conductive trace having a first terminal coupled to a first terminal of the semiconductor die, the second conductive trace being formed in proximity to the first conductive trace, and
(c) a resistor coupled between a second terminal of the second conductive trace and the ground terminal; and
a second IPD formed over the substrate, the second IPD including,
(d) a first inductor having a first terminal coupled to a second terminal of the semiconductor die and a second terminal coupled to a second terminal of the first conductive trace,
(e) a second inductor having a first terminal coupled to a third terminal of the semiconductor die and a second terminal coupled to the ground terminal, and
(f) a third inductor having a first terminal coupled to a fourth terminal of the semiconductor die and a second terminal coupled to the ground terminal, the first inductor being formed in proximity to the second and third inductors.
7. The semiconductor die of claim 6 , wherein the first, second, and third inductors operate as a balun.
8. The semiconductor die of claim 6 , further including a capacitor coupled between the first and second terminals of the semiconductor die.
9. The semiconductor die of claim 6 , further including:
a first capacitor coupled between the third terminal of the semiconductor die and ground terminal;
a second capacitor coupled between the fourth terminal of the semiconductor die and ground terminal; and
a third capacitor coupled between the first and second terminals of the first inductor.
10. A semiconductor die, comprising:
a substrate;
a first integrated passive device (IPD) formed over the substrate, the first IPD including an RF coupler; and
a second IPD formed over the substrate and electrically connected to the RF coupler, the second IPD including a balun having,
(a) a first inductor, and
(b) a second inductor interwound with the first inductor to partially overlap with the first inductor.
11. The semiconductor die of claim 10 , wherein the first IPD includes:
a first conductive trace having a first terminal coupled to a first terminal of the semiconductor die;
a second conductive trace having a first terminal coupled to a second terminal of the semiconductor die, the second conductive trace being formed in proximity to the first conductive trace; and
a resistor coupled between a second terminal of the second conductive trace and a ground terminal.
12. The semiconductor die of claim 11 , wherein the second IPD includes:
the first inductor having a first terminal coupled to a second terminal of the first conductive trace and a second terminal coupled to the ground terminal;
the second inductor having a first terminal coupled to a third terminal of the semiconductor die and a second terminal coupled to the ground terminal; and
a third inductor having a first terminal coupled to a fourth terminal of the semiconductor die and a second terminal coupled to the ground terminal, the first inductor being formed in proximity to the second and third inductors.
13. The semiconductor die of claim 10 , wherein the first IPD includes:
a first conductive trace having a first terminal coupled to a ground terminal;
a second conductive trace having a first terminal coupled to a first terminal of the semiconductor die, the second conductive trace being formed in proximity to the first conductive trace; and
a resistor coupled between a second terminal of the second conductive trace and the ground terminal.
14. The semiconductor die of claim 13 , wherein the second IPD includes:
the first inductor having a first terminal coupled to a second terminal of the semiconductor die and a second terminal coupled to a second terminal of the first conductive trace;
the second inductor having a first terminal coupled to a third terminal of the semiconductor die and a second terminal coupled to the ground terminal; and
a third inductor having a first terminal coupled to a fourth terminal of the semiconductor die and a second terminal coupled to the ground terminal, the first inductor being formed in proximity to the second and third inductors.
15. The semiconductor die of claim 10 , further including a capacitive component coupled between first and second terminals of the semiconductor die.
16. The semiconductor die of claim 15 , wherein the capacitor component includes first and second capacitors connected in series.
17. The semiconductor die of claim 10 , further including:
a first capacitor coupled between a third terminal of the semiconductor die and a ground terminal; and
a second capacitor coupled between a fourth terminal of the semiconductor die and the ground terminal.
18. The semiconductor die of claim 10 , wherein the second IPD further includes a third inductor interwound with the first and second inductors to partially overlap with the first and second inductors.
19. A method of making a semiconductor die, comprising:
providing a substrate;
forming a first integrated passive device (IPD) over the substrate, the first IPD including an RF coupler;
forming a second IPD over the substrate, the second IPD including a balun electrically connected to the RF coupler; and
forming a capacitor between first and second terminals of the semiconductor die.
20. The method of claim 19 , further including:
forming a first capacitor between a third terminal of the semiconductor die and a ground terminal; and
forming a second capacitor between a fourth terminal of the semiconductor die and the ground terminal.
21. The method of claim 19 , wherein forming the first IPD includes:
forming a first conductive trace having a first terminal coupled to a ground terminal;
forming a second conductive trace having a first terminal coupled to a first terminal of the semiconductor die, the second conductive trace being formed in proximity to the first conductive trace; and
forming a resistor between a second terminal of the second conductive trace and the ground terminal.
22. The method of claim 21 , wherein forming the second IPD includes:
forming a first inductor having a first terminal coupled to a second terminal of the semiconductor die and a second terminal coupled to a second terminal of the first conductive trace;
forming a second inductor having a first terminal coupled to a third terminal of the semiconductor die and a second terminal coupled to the ground terminal; and
forming a third inductor having a first terminal coupled to a fourth terminal of the semiconductor die and a second terminal coupled to the ground terminal, the first inductor being formed in proximity to the second and third inductors.
23. The method of claim 19 , wherein forming the first IPD includes:
forming a first conductive trace having a first terminal coupled to a first terminal of the semiconductor die;
forming a second conductive trace having a first terminal coupled to a second terminal of the semiconductor die, the second conductive trace being formed in proximity to the first conductive trace; and
forming a resistor between a second terminal of the second conductive trace and a ground terminal.
24. The method of claim 23 , wherein forming the second IPD includes:
forming a first inductor having a first terminal coupled to a second terminal of the first conductive trace and a second terminal coupled to the ground terminal;
forming a second inductor having a first terminal coupled to a third terminal of the semiconductor die and a second terminal coupled to the ground terminal; and
forming a third inductor having a first terminal coupled to a fourth terminal of the semiconductor die and a second terminal coupled to the ground terminal, wherein the first inductor is formed in proximity to the second and third inductors.
25. A method of making a semiconductor die, comprising:
providing a substrate;
forming a first integrated passive device (IPD) over the substrate, the first IPD including an RF coupler;
forming a second IPD over the substrate by,
(a) forming a first inductor, and
(b) forming a second inductor interwound with the first inductor to partially overlap with the first inductor.
26. The method of claim 25 , wherein forming the first IPD includes:
forming a first conductive trace having a first terminal coupled to a first terminal of the semiconductor die;
forming a second conductive trace having a first terminal coupled to a second terminal of the semiconductor die, the second conductive trace being formed in proximity to the first conductive trace; and
forming a resistor between a second terminal of the second conductive trace and a ground terminal.
27. The method of claim 26 , wherein forming the second IPD includes:
forming the first inductor having a first terminal coupled to a second terminal of the first conductive trace and a second terminal coupled to the ground terminal;
forming the second inductor having a first terminal coupled to a third terminal of the semiconductor die and a second terminal coupled to the ground terminal; and
forming a third inductor having a first terminal coupled to a fourth terminal of the semiconductor die and a second terminal coupled to the ground terminal, the first inductor being formed in proximity to the second and third inductors.
28. The method of claim 25 , wherein forming the first IPD includes:
forming a first conductive trace having a first terminal coupled to a ground terminal;
forming a second conductive trace having a first terminal coupled to a first terminal of the semiconductor die, the second conductive trace being formed in proximity to the first conductive trace; and
forming a resistor between a second terminal of the second conductive trace and the ground terminal.
29. The method of claim 28 , wherein forming the second IPD includes:
forming the first inductor having a first terminal coupled to a second terminal of the semiconductor die and a second terminal coupled to a second terminal of the first conductive trace;
forming the second inductor having a first terminal coupled to a third terminal of the semiconductor die and a second terminal coupled to the ground terminal; and
forming a third inductor having a first terminal coupled to a fourth terminal of the semiconductor die and a second terminal coupled to the ground terminal, the first inductor being formed in proximity to the second and third inductors.
30. The method of claim 25 , further including forming a capacitor between first and second terminals of the semiconductor die.
31. The method of claim 25 , wherein forming the second IPD further includes forming a third inductor interwound with the first and second inductors to partially overlap with the first and second inductors.