IP Library Granted Patent US 7,888,184
Granted Patent B2
US 7,888,184 · App. 12/473,233 · Granted Feb 15, 2011

Integrated circuit packaging system with embedded circuitry and post, and method of manufacture thereof

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Quick Facts
Patent No.
US 7,888,184
App. No.
12/473,233
Granted
Feb 15, 2011
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a shaped platform with a conductive post; mounting the shaped platform with the conductive post over a temporary carrier; mounting an integrated circuit device over the temporary carrier; encapsulating the conductive post and the integrated circuit device; removing a portion of the shaped platform isolating the conductive post; and removing the temporary carrier.

Claims (26)

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a shaped platform with a conductive post;

mounting the shaped platform with the conductive post over a temporary carrier;

mounting an integrated circuit device over the temporary carrier;

encapsulating the conductive post and the integrated circuit device leaving a first end of the conductive post exposed from the encapsulation;

removing a portion of the shaped platform forming at least two discrete conductive post whereby the conductive post extends through the encapsulant and a second end of the conductive post is exposed from the encapsulant; and

removing the temporary carrier.

2. The method as claimed in claim 1 wherein removing the portion of the shaped platform includes providing a top encapsulant surface of an encapsulant coplanar with a contact surface of the conductive posts.

3. The method as claimed in claim 1 further comprising

forming a top connect structure over the integrated circuit, the top connect structure connected with a contact surface of the conductive posts; and

forming a bottom connect structure below the integrated circuit, the bottom connect structure connected with a base surface of the conductive posts.

4. The method as claimed in claim 1 wherein mounting the integrated circuit device includes mounting the integrated circuit device over the temporary carrier adjacent the conductive posts.

5. The method as claimed in claim 1 further comprising stacking a first stackable assembly over a second stackable assembly, a conductive post of the second stackable assembly connects to a conductive post of the first stackable assembly.

6. A method of manufacture of an integrated circuit packaging system comprising:

providing a temporary carrier with an adhesive layer;

mounting a shaped platform with a conductive post on the adhesive layer;

mounting an integrated circuit device with an active side on the adhesive layer adjacent the conductive post;

encapsulating the conductive post and the integrated circuit device leaving a first end of the conductive post exposed from the encapsulation;

removing the shaped platform from the conductive post whereby the conductive post extends through the encapsulant and a second end of the conductive post is exposed from the encapsulant; and

removing the temporary carrier and the adhesive layer.

7. The method as claimed in claim 6 wherein mounting the integrated circuit device includes mounting the integrated circuit device with the active side on the adhesive layer below an access through region adjacent the conductive post and over the temporary carrier.

8. The method as claimed in claim 6 wherein encapsulating the conductive post includes:

applying an encapsulant over the conductive post, the shaped platform, and the integrated circuit device; and

removing a portion of the encapsulant to expose the shaped platform.

9. The method as claimed in claim 6 further comprising forming a bottom connect structure having an integrated passive device layer and a bottom exposed conductor electrically connected to the post and below the conductive post.

10. The method as claimed in claim 6 further comprising forming a top connect structure having a redistribution layer over the conductive post.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVER SHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 064783 FRAME 0896. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE CHANGE OF NAME. Recorded Sep 22, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065015/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVERSHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 038378 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 14, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064962/0123 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0292) Recorded Aug 30, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE.LTE.
Reel/Frame 064783/0896 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0292 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 14, 2009
From: SHIM, IL KWON; CHOW, SENG GUAN; KUAN, HEAP HOE; YOON, SEUNG UK; HA, JONG-WOO
To: STATS CHIPPAC LTD.
Reel/Frame 022822/0523 →