Programmable system on a chip for power-supply voltage and current monitoring and control
A programmable system-on-a-chip integrated circuit device includes a programmable logic block, at least one user non-volatile memory block, and voltage-measuring and control analog and digital circuits on a single semiconductor integrated circuit chip or a flip chip, face-to-face, or other multiple die configuration. The programmable system-on-a-chip integrated circuit with voltage-measuring, current-measuring and control circuitry performs voltage measurement and control functions and can be used to control and monitor external power supplies connected to external loads.
1. A programmable system-on-a-chip integrated circuit device, comprising:
a processor;
a programmable logic block coupled to the processor and comprising a plurality of programmable logic cells configurable to realize Boolean functions of multiple variables programmably coupled to a programmable interconnect architecture;
a non-volatile memory block coupled to the processor;
an analog function block coupled to the processor;
an analog multiplexer;
a power MOSFET gate driver circuit; and
a plurality of input/output pads, at least one of the plurality of input/output pads coupled to the analog function block through the analog multiplexer, at least one of the plurality of input/output pads programmably coupleable to the programmable logic block, and at least one of the plurality of input/output pads programmable coupleable to the programmable logic block through the power MOSFET gate driver circuit.
2. The programmable system-on-a-chip integrated circuit device of claim 1 , further comprising a clock generator circuit with an output coupled to the programmable logic block.
3. The programmable system-on-a-chip integrated circuit device of claim 1 , wherein the clock generator circuit programmably selects a clock to present at its output from a group comprising at least two of the following clock sources: an external crystal, an internal oscillator, and an external clock.
4. The programmable system-on-a-chip integrated circuit device of claim 3 , further comprising a phase-locked loop circuit with an input coupled to the clock generator circuit and an output coupled to the programmable logic block.
5. The programmable system-on-a-chip integrated circuit device of claim 1 , further comprising a volatile memory block configurable into a plurality of smaller volatile memory blocks, the volatile memory block coupled to the processor.
6. The programmable system-on-a-chip integrated circuit device of claim 1 , wherein the programmable logic block comprises a field programmable gate array.
7. The programmable system-on-a-chip integrated circuit device of claim 1 , wherein the programmable logic block comprises a complex programmable logic device.
8. The programmable system-on-a-chip integrated circuit device of claim 1 , wherein the processor comprises an 8051 hardwired core.
9. The programmable system-on-a-chip integrated circuit device of claim 1 , wherein the programmable logic block is coupled to the processor through user-programmable interconnect.
10. The programmable system-on-a-chip integrated circuit device of claim 1 , wherein the programmable logic block is coupled to the processor through a system bus.