Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMP
A semiconductor device is made by mounting a semiconductor wafer to a temporary carrier. A plurality of TSV is formed through the wafer. A cavity is formed partially through the wafer. A first semiconductor die is mounted to a second semiconductor die. The first and second die are mounted to the wafer such that the first die is disposed over the wafer and electrically connected to the TSV and the second die is disposed within the cavity. An encapsulant is deposited over the wafer and first and second die. A portion of the encapsulant is removed to expose a first surface of the first die. A portion of the wafer is removed to expose the TSV and a surface of the second die. The remaining portion of the wafer operates as a TSV interposer for the first and second die. An interconnect structure is formed over the TSV interposer.
1. A method of manufacturing a semiconductor device, comprising:
mounting a semiconductor wafer to a temporary carrier;
forming a plurality of through silicon vias (TSV) through the semiconductor wafer;
forming a cavity partially through the semiconductor wafer;
mounting a first semiconductor die to a second semiconductor die;
mounting the first and second semiconductor die to the semiconductor wafer such that the first semiconductor die is disposed over the semiconductor wafer and electrically connected to the TSV and the second semiconductor die is disposed within the cavity;
depositing an encapsulant over the semiconductor wafer and around the first and second semiconductor die;
removing a portion of the encapsulant to expose a first surface of the first semiconductor die;
removing a portion of the semiconductor wafer to expose the TSV and a first surface of the second semiconductor die, the remaining portion of the semiconductor wafer operating as a TSV interposer for the first and second semiconductor die; and
forming a first interconnect structure over the TSV interposer.
2. The method of claim 1 , wherein the exposed first surface of the first semiconductor die and exposed first surface of the second semiconductor die provide for heat dissipation.
3. The method of claim 1 , wherein the first and second semiconductor die and TSV interposer are made with similar material to provide thermal stress relief.
4. The method of claim 1 , further including forming a metal plate over the first surface of the first semiconductor die for heat dissipation.
5. The method of claim 1 , further including forming a shielding layer over the first surface of the first semiconductor die against electromagnetic interference.
6. The method of claim 1 , further including forming a plurality of conductive pillars through the encapsulant around the first semiconductor die.
7. The method of claim 1 , further including forming a second interconnect structure over the first surface of the first semiconductor die.
8. A method of manufacturing a semiconductor device, comprising:
providing a semiconductor wafer;
forming a plurality of conductive vias through the semiconductor wafer;
forming a first cavity in the semiconductor wafer;
mounting a first semiconductor die to a second semiconductor die;
mounting the first and second semiconductor die to the semiconductor wafer such that the first semiconductor die is disposed over the semiconductor wafer and electrically connected to the conductive vias and the second semiconductor die is disposed within the first cavity;
depositing an encapsulant over the semiconductor wafer and around the first and second semiconductor die;
removing a portion of the semiconductor wafer to expose the conductive vias and a first surface of the second semiconductor die, the remaining portion of the semiconductor wafer operating as an interposer for the first and second semiconductor die; and
forming a first interconnect structure over the interposer.
9. The method of claim 8 , further including forming a second cavity in the semiconductor for singulation of the semiconductor wafer, the second cavity leaving the encapsulant on the sides of the interposer after singulation.
10. The method of claim 8 , further including:
forming a plurality of conductive pillars through the encapsulant around the first semiconductor die; and
forming a conductive layer in the encapsulant.
11. The method of claim 8 , further including removing a portion of the encapsulant to expose a first surface of the first semiconductor die.
12. The method of claim 8 , further including forming a plurality of conductive vias through the second semiconductor die.
13. The method of claim 8 , further including forming a metal plate over the first surface of the first semiconductor die.
14. The method of claim 8 , further including forming a second interconnect structure over the first surface of the first semiconductor die.
15. A method of manufacturing a semiconductor device, comprising:
providing a semiconductor wafer;
forming a plurality of conductive vias through the semiconductor wafer;
forming a cavity in the semiconductor wafer;
mounting a first semiconductor die to a second semiconductor die;
mounting the first and second semiconductor die to the semiconductor wafer such that the first semiconductor die is disposed over the semiconductor wafer and electrically connected to the conductive vias and the second semiconductor die is disposed within the cavity;
depositing an encapsulant over the semiconductor wafer and first and second semiconductor die; and
removing a portion of the semiconductor wafer to expose the conductive vias and a first surface of the second semiconductor die, the remaining portion of the semiconductor wafer operating as an interposer for the first and second semiconductor die.
16. The method of claim 15 , further including forming a first interconnect structure over the interposer.
17. The method of claim 15 , further including removing a portion of the encapsulant to expose a first surface of the first semiconductor die.
18. The method of claim 15 , further including forming a plurality of conductive pillars through the encapsulant around the first semiconductor die.
19. The method of claim 15 , further including forming a metal plate over the first surface of the first semiconductor die.
20. The method of claim 15 , further including forming a second interconnect structure over the first surface of the first semiconductor die.