IP Library Granted Patent US 8,390,108
Granted Patent B2
US 8,390,108 · App. 12/639,984 · Granted Mar 5, 2013

Integrated circuit packaging system with stacking interconnect and method of manufacture thereof

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Quick Facts
Patent No.
US 8,390,108
App. No.
12/639,984
Granted
Mar 5, 2013
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: fabricating a base package substrate; coupling a conductive column lead frame to the base package substrate by: providing a lead frame support, patterning a conductive material on the lead frame support including forming an interconnect securing structure, and coupling the conductive material to the base package substrate; forming a base package body between the base package substrate and the conductive column lead frame; and removing the lead frame support from the conductive column lead frame for exposing the interconnect securing structure from the base package body.

Claims (44)

1. A method of manufacture of an integrated circuit packaging system comprising:

fabricating a base package substrate having a system pad on a system side coupled to a component pad on a component side;

coupling a conductive column lead frame to the component pad of the base package substrate by:

providing a lead frame support,

patterning a conductive material on the lead frame support including forming an interconnect securing structure, and

coupling the conductive material to the base package substrate;

forming a base package body of an encapsulation molded between the base package substrate and the conductive column lead frame;

removing the lead frame support from the conductive column lead frame for exposing the interconnect securing structure from the base package body; and

coupling a stacked integrated circuit die in a stacked package to the system pad through the conductive column.

2. The method as claimed in claim 1 further comprising forming an array of contact pads on the base package body.

3. The method as claimed in claim 1 wherein removing the lead frame support from the conductive column lead frame includes performing an etching, a machining, or a mechanical peel to expose a seed layer.

4. The method as claimed in claim 1 further comprising forming an array of secure contacts on the base package body including forming a secure contact pad on the lead frame support.

5. The method as claimed in claim 1 further comprising reflowing a system interconnect on a seed layer and over the interconnect securing structure includes a conductive column having the interconnect securing structure protruding from or recessed into a conductive material.

6. A method of manufacture of an integrated circuit packaging system comprising:

fabricating a base package substrate having component pads on a component side coupled to system interconnects on a system side;

coupling a conductive column lead frame to the component pads by:

providing a lead frame support,

patterning a seed layer on the lead frame support including forming an interconnect securing structure,

depositing a conductive material on the seed layer, and

coupling the conductive material to the component pad includes a conductive adhesive between the component pads and the conductive material;

forming a base package body between the base package substrate and the conductive column lead frame by molding an encapsulation on the conductive column lead frame;

removing the lead frame support from the conductive column lead frame for exposing the seed layer on the interconnect securing structure from the base package body; and

coupling a stacked integrated circuit die in a stacked package to the system pad through the conductive column.

7. The method as claimed in claim 6 further comprising forming an array of contact pads on the base package body includes patterning a contact and an interconnect trace by the seed layer deposited on the conductive column lead frame.

8. The method as claimed in claim 6 wherein removing the lead frame support from the conductive column lead frame includes performing an etching, a machining, or a mechanical peel to expose the seed layer includes a dissimilar metal used in the lead frame support as compared to the seed layer.

9. The method as claimed in claim 6 further comprising forming an array of secure contacts on the base package body including:

forming a secure contact pad on the lead frame support; and

forming interconnect traces coupled to the secure contact pad by patterning the seed layer.

10. The method as claimed in claim 6 wherein reflowing the system interconnect on the seed layer and over the interconnect securing structure includes a conductive column having the interconnect securing structure protruding from or recessed into a conductive material by forming an interconnect securing cross, an interconnect securing rectangle, or an interconnect securing cylinder.

11. An integrated circuit packaging system comprising:

a base package substrate having a system pad on a system side coupled to a component pad on a component side;

a conductive column having an interconnect securing structure coupled to the component pad of the base package substrate by a conductive adhesive;

a base package body formed of an encapsulation molded on the conductive column and the base package substrate with the conductive column and the interconnect securing structure exposed on a top surface; and

a stacked integrated circuit die in a stacked package coupled to the system pad through the conductive column.

12. The system as claimed in claim 11 further comprising an array of contact pads on the top surface of the base package body.

13. The system as claimed in claim 11 further comprising:

component pads on the base package substrate; and

a base integrated circuit die coupled to the component pads.

14. The system as claimed in claim 11 further comprising an array of secure contacts on the base package body.

15. The system as claimed in claim 11 wherein the conductive column exposed on the top surface of the base package body includes a seed layer formed on the interconnect securing structure.

16. The system as claimed in claim 11 further comprising an array of contact pads on the top surface of the base package body includes a contact pad formed of a seed layer exposed on the top surface of the base package body.

17. The system as claimed in claim 11 further comprising a base integrated circuit die coupled to the component pads on the base package substrate includes chip interconnects between the base integrated circuit die and the component pads.

18. The system as claimed in claim 11 further comprising an array of secure contacts on the base package body includes a seed layer on an interconnect securing structure forms a secure contact pad.

19. The system as claimed in claim 11 further comprising a base integrated circuit die in the base package coupled to the stacked integrated circuit die, through the conductive columns, the system pads, or a combination thereof includes the conductive columns having an interconnect securing cross, an interconnect securing rectangle, or an interconnect securing cylinder.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON THE COVER SHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 038378 FRAME 0244. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065239/0786 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0244 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2009
From: CHO, NAMJU; CHI, HEEJO; SHIN, HANGIL; HUANG, RUI; CHOW, SENG GUAN; KUAN, HEAP HOE
To: STATS CHIPPAC LTD.
Reel/Frame 023712/0743 →