IP Library Granted Patent US 8,421,210
Granted Patent B2
US 8,421,210 · App. 12/785,951 · Granted Apr 16, 2013

Integrated circuit packaging system with dual side connection and method of manufacture thereof

Inventors: HeeJo Chi (Ichon-si, KR); Soo Jung Park (Icheon-si, KR); Junwoo Myung (Ichon-si, KR)
Assignee: STATS ChipPAC Ltd.
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Quick Facts
Patent No.
US 8,421,210
App. No.
12/785,951
Granted
Apr 16, 2013
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: forming a first terminal; connecting an integrated circuit to the first terminal; forming a second terminal connected over the first terminal and the integrated circuit by a vertical conductive post integral with the first terminal or the second terminal; and encapsulating the integrated circuit and the vertical conductive post leaving portions of the first terminal and the second terminal exposed.

Claims (58)

1. A method of manufacture of an integrated circuit packaging system comprising:

forming a first leadframe including first terminals;

connecting an integrated circuit to the first terminals;

forming a second leadframe including second terminals connected over the first terminals and the integrated circuit by vertical conductive posts integral with the first terminals or the second terminals;

encapsulating the integrated circuit and the vertical conductive posts leaving portions of the first terminals and the second terminals exposed;

forming the first terminals includes forming the first terminals having a cavity ring; and

forming the second terminals includes forming the second terminals connected over the first terminals and the integrated circuit by the vertical conductive posts surrounded by the cavity ring.

2. The method as claimed in claim 1 wherein forming the second terminals connected over the first terminals includes connecting a conductive material to the first terminals and the vertical conductive posts.

3. The method as claimed in claim 1 wherein forming the second terminals connected over the first terminals includes connecting first vertical conductive posts and second vertical conductive posts, the first vertical conductive posts integral with the first terminals and the second vertical conductive posts integral with the second terminals.

4. A method of manufacture of an integrated circuit packaging system comprising:

forming a first leadframe including first terminals;

connecting an integrated circuit to the first terminals;

forming a second leadframe including second terminals connected over the first terminals and the integrated circuit by vertical conductive posts integral with the first terminals or the second terminals;

encapsulating the integrated circuit and the vertical conductive posts leaving portions of the first terminals and the second terminals exposed;

forming the first terminals includes forming the first terminals having a recess; and

forming the second terminals includes forming the second terminals connected over the first terminals and the integrated circuit by the vertical conductive posts in the recess.

5. The method as claimed in claim 4 wherein forming the second terminals connected over the first terminals includes connecting a conductive material to the first terminals and the vertical conductive posts.

6. The method as claimed in claim 4 wherein forming the second terminals connected over the first terminals includes connecting first vertical conductive posts and second vertical conductive posts, the first vertical conductive posts integral with the first terminals and the second vertical conductive posts integral with the second terminals.

7. An integrated circuit packaging system comprising:

a first leadframe including first terminals;

an integrated circuit connected to the first terminals;

a second leadframe including second terminals over the first terminals and the integrated circuit;

vertical conductive posts connected to each of the first terminals and the second terminals, the vertical conductive posts integral with the first terminals or the second terminals;

an encapsulation covering the integrated circuit and the vertical conductive posts leaving portions of the first terminals and the second terminals exposed;

wherein the first terminals have a cavity ring; and

the vertical conductive posts are surrounded by the cavity ring.

8. The system as claimed in claim 7 wherein the vertical conductive posts connected to the first terminals and the second terminals include:

first vertical conductive posts integral with the first terminals; and

second vertical conductive posts connected to the first vertical conductive posts, the second vertical conductive posts integral with the second terminals.

9. The system as claimed in claim 7 wherein the vertical conductive posts are adjacent to the integrated circuit.

10. The system as claimed in claim 9 further comprising:

the integrated circuit partially over the first terminals.

11. The system as claimed in claim 9 wherein the second terminals include a horizontal portion.

12. The system as claimed in claim 9 further comprising:

a package paddle adjacent to the first terminals; and

wherein:

the integrated circuit is over the package paddle.

13. The system as claimed in claim 9 wherein the integrated circuit is a flip-chip connected to the first terminals.

14. An integrated circuit packaging system comprising:

a first leadframe including first terminals;

an integrated circuit connected to the first terminals;

a second leadframe including second terminals over the first terminals and the integrated circuit;

vertical conductive posts connected to each of the first terminals and the second terminals, the vertical conductive posts integral with the first terminals or the second terminals;

an encapsulation covering the integrated circuit and the vertical conductive posts leaving portions of the first terminals and the second terminals exposed;

wherein the first terminals have a recess; and

the vertical conductive posts are in the recess.

15. The system as claimed in claim 14 wherein the vertical conductive posts connected to the first terminals and the second terminals include:

first vertical conductive posts integral with the first terminals; and

second vertical conductive posts connected to the first vertical conductive posts, the second vertical conductive posts integral with the second terminals.

16. The system as claimed in claim 14 wherein the vertical conductive posts are adjacent to the integrated circuit.

17. The system as claimed in claim 16 further comprising:

the integrated circuit partially over the first terminals.

18. The system as claimed in claim 16 wherein the second terminals include a horizontal portion.

19. The system as claimed in claim 16 further comprising:

a package paddle adjacent to the first terminals; and

wherein:

the integrated circuit is over the package paddle.

20. The system as claimed in claim 16 wherein the integrated circuit is a flip-chip connected to the first terminals.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0235. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0741 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0235 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2010
From: CHI, HEEJO; PARK, SOO JUNG; MYUNG, JUNWOO
To: STATS CHIPPAC LTD.
Reel/Frame 024538/0690 →
Continuity (1)
Related Publication 20110285009A1 · Nov 24, 2011