IP Library Granted Patent US 8,304,900
Granted Patent B2
US 8,304,900 · App. 12/854,306 · Granted Nov 6, 2012

Integrated circuit packaging system with stacked lead and method of manufacture thereof

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,304,900
App. No.
12/854,306
Granted
Nov 6, 2012
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a substrate; attaching an integrated circuit device to the substrate; forming a stud interconnect having stacked studs, the stud interconnect on the substrate and having a contact surface and a crown surface on an end of the stud interconnect opposite the substrate; applying an encapsulation over the integrated circuit die, over the stud interconnect, and over the substrate; and forming a cavity in the encapsulation over the stud interconnect, the contact surface and the crown surface exposed in the cavity.

Claims (35)

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a substrate;

attaching an integrated circuit device to the substrate;

forming a stud interconnect having stacked studs, the stud interconnect on the substrate and having a contact surface and a crown surface on an end of the stud interconnect opposite the substrate;

applying an encapsulation over the integrated circuit die, over the stud interconnect, and over the substrate; and

forming a cavity in the encapsulation over the stud interconnect, the contact surface and the crown surface exposed in the cavity.

2. The method as claimed in claim 1 wherein forming the cavity includes forming the cavity with a non-vertical side of the encapsulation.

3. The method as claimed in claim 1 wherein forming the stud interconnect includes forming a stud base of the stud interconnect on the substrate.

4. The method as claimed in claim 1 further comprising connecting another integrated circuit package to the crown surface.

5. The method as claimed in claim 1 further comprising attaching a package connector to a side of the substrate facing away from the encapsulation.

6. A method of manufacture of an integrated circuit packaging system comprising:

providing a substrate;

attaching an integrated circuit device to the substrate;

forming a stud interconnect having stacked studs, the stud interconnect on the substrate and having a contact surface and a crown surface on an end of the stud interconnect opposite the substrate;

applying an encapsulation over the integrated circuit die, over the stud interconnect, and over the substrate;

forming a cavity in the encapsulation over the stud interconnect, the contact surface and the crown surface exposed in the cavity; and

connecting a package connector to a side of the substrate opposite the encapsulation.

7. The method as claimed in claim 6 wherein forming the cavity in the encapsulation includes forming the cavity having an upper width greater than a lower width.

8. The method as claimed in claim 6 wherein forming the stud interconnect includes attaching the stud interconnect to a substrate conductor of the substrate.

9. The method as claimed in claim 6 further comprising connecting an integrated circuit package to the contact surface.

10. The method as claimed in claim 6 wherein connecting the package connector includes attaching the package connector to a substrate conductor on a side of the substrate opposite the encapsulation.

11. An integrated circuit packaging system comprising:

a substrate;

an integrated circuit device attached to the substrate;

a stud interconnect having stacked studs, the stud interconnect on the substrate and having a contact surface and a crown surface on an end of the stud interconnect opposite the substrate; and

an encapsulation over the integrated circuit die, over the stud interconnect, and over the substrate, and the encapsulation having a cavity over the stud interconnect with the contact surface and the crown surface exposed in the cavity.

12. The system as claimed in claim 11 wherein the cavity includes the cavity formed with a non-vertical side of the encapsulation.

13. The system as claimed in claim 11 wherein the stud interconnect includes a stud base of the stud interconnect formed on the substrate.

14. The system as claimed in claim 11 further comprising another integrated circuit package connected to the crown surface.

15. The system as claimed in claim 11 further comprising a package connector connected to a side of the substrate facing away from the encapsulation.

16. The system as claimed in claim 11 further comprising a package connector connected to a side of the substrate opposite the encapsulation.

17. The system as claimed in claim 16 wherein the cavity includes having an upper width greater than a lower width.

18. The system as claimed in claim 16 wherein the stud interconnect includes the stud interconnect attached to a substrate conductor of the substrate.

19. The system as claimed in claim 16 further comprising an integrated circuit package connected to the contact surface.

20. The system as claimed in claim 16 wherein the package connector includes the package connector attached to a substrate conductor on a side of the substrate exposed from the encapsulation.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0252. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0784 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0252 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2010
From: JANG, KI YOUN; KIM, YOUNGJOON; BAE, JOHYUN
To: STATS CHIPPAC LTD.
Reel/Frame 024894/0886 →