IP Library Granted Patent US 8,093,727
Granted Patent B2
US 8,093,727 · App. 12/871,031 · Granted Jan 10, 2012

Integrated circuit package-in-package system with side-by-side and offset stacking and method for manufacturing thereof

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Quick Facts
Patent No.
US 8,093,727
App. No.
12/871,031
Granted
Jan 10, 2012
Kind
B2
Abstract

A method for manufacturing of an integrated circuit package-in-package system includes: mounting a first integrated circuit device over a substrate; mounting an integrated circuit package system having an inner encapsulation over the first integrated circuit device with a first offset; mounting a second integrated circuit device over the first integrated circuit device and adjacent to the integrated circuit package system; connecting the integrated circuit package system and the substrate; and forming a package encapsulation as a cover for the first integrated circuit device, the integrated circuit package system, and the second integrated circuit device.

Claims (59)

1. A method for manufacturing of an integrated circuit package-in-package system comprising:

mounting a first integrated circuit device over a substrate;

mounting an integrated circuit package system having an inner encapsulation over the first integrated circuit device with a first offset;

mounting a second integrated circuit device over the first integrated circuit device and adjacent to the integrated circuit package system;

connecting the integrated circuit package system and the substrate; and

forming a package encapsulation as a cover for the first integrated circuit device, the integrated circuit package system, and the second integrated circuit device.

2. The method as claimed in claim 1 wherein mounting the first integrated circuit device over the substrate includes connecting a flip chip to the substrate.

3. The method as claimed in claim 1 wherein mounting the integrated circuit package system having the inner encapsulation over the first integrated circuit device with the first offset includes:

providing a support structure over the substrate at the first offset; and

mounting the integrated circuit package system over the support structure.

4. The method as claimed in claim 1 wherein mounting the integrated circuit package system having the inner encapsulation over the first integrated circuit device with the first offset includes:

providing a carrier of the integrated circuit package system facing the first integrated circuit device; and

connecting a first internal interconnect at the first offset between the carrier and the substrate.

5. A method for manufacturing of an integrated circuit package-in-package system comprising:

mounting a flip chip over a substrate;

mounting an integrated circuit package system having both a carrier and an inner encapsulation over the flip chip with a first offset;

mounting a second integrated circuit device over the flip chip and adjacent to the integrated circuit package system;

connecting the integrated circuit package system and the substrate; and

forming a package encapsulation as a cover for the flip chip, the integrated circuit package system, and the second integrated circuit device.

6. The method as claimed in claim 5 wherein:

mounting the integrated circuit package system having both the carrier and the inner encapsulation over the flip chip with the first offset includes:

placing the carrier facing the flip chip;

connecting a first internal interconnect at the first offset between the carrier and the substrate; and

forming the package encapsulation includes:

exposing the inner encapsulation.

7. The method as claimed in claim 5 wherein mounting the integrated circuit package system having the inner encapsulation over the flip chip with the first offset includes:

providing a support structure over the substrate at the first offset; and

mounting the integrated circuit package system over the support structure with the inner encapsulation facing the support structure.

8. The method as claimed in claim 5 further comprising attaching an external interconnect under the substrate.

9. An integrated circuit package-in-package system comprising:

a substrate;

a first integrated circuit device mounted over the substrate;

an integrated circuit package system having an inner encapsulation over the first integrated circuit device with a first offset and connected with the substrate;

a second integrated circuit device over the first integrated circuit device and adjacent to the integrated circuit package system; and

a package encapsulation as a cover for the first integrated circuit device, the integrated circuit package system, and the second integrated circuit device.

10. The system as claimed in claim 9 wherein the first integrated circuit device mounted over the substrate includes a flip chip connected to the substrate.

11. The system as claimed in of claim 9 further comprising:

a support structure over the substrate at the first offset; and

wherein:

the integrated circuit package system is over the support structure.

12. The system as claimed in claim 9 wherein:

the integrated circuit package system includes a carrier facing the first integrated circuit device; and

further comprising:

a first internal interconnect at the first offset between the carrier and the substrate.

13. The system as claimed in claim 9 wherein:

the first integrated circuit device includes a flip chip; and

the integrated circuit package system includes a carrier.

14. The system as claimed in claim 13 wherein the second integrated circuit device includes an integrated circuit die mounted with a second offset to the flip chip and connected with the substrate.

15. The system as claimed in of claim 13 wherein:

the integrated circuit package system includes:

the carrier facing the flip chip;

a first internal interconnect connected between the carrier and the substrate at the first offset; and

the package encapsulation includes:

the inner encapsulation exposed from the package encapsulation.

16. The system as claimed in claim 13 further comprising:

a support structure over the substrate at the first offset; and

wherein:

the integrated circuit package system mounted over the support structure with the inner encapsulation facing the support structure.

17. The system as claimed in claim 13 further comprising an external interconnect under the substrate.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0272. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0730 →
RELEASE OF SECURITY INTEREST Recorded Jun 9, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052879/0852 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0272 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →