Semiconductor device and method of forming high routing density BOL BONL and BONP interconnect sites on substrate
View Patent ↗A semiconductor device has a semiconductor die with a plurality of bumps formed over contact pads on a surface of the semiconductor die. The bumps can have a fusible portion and non-fusible portion. A plurality of conductive traces is formed over a substrate with interconnect sites having a width greater than 20% and less than 80% of a width of a contact interface between the bumps and contact pads. The bumps are bonded to the interconnect sites so that the bumps cover a top surface and side surface of the interconnect sites. An encapsulant is deposited around the bumps between the semiconductor die and substrate. The conductive traces have a pitch as determined by minimum spacing between adjacent conductive traces that can be placed on the substrate and the width of the interconnect site provides a routing density equal to the pitch of the conductive traces.
1. A method of making a semiconductor device, comprising:
providing a semiconductor die including a contact pad;
providing a substrate;
forming a conductive trace over the substrate including an interconnect site; and
forming an interconnect structure between the contact pad and the interconnect site, wherein a width of the interconnect site is greater than 20% and less than 80% of a width of a contact interface between the interconnect structure and the contact pad.
2. The method of claim 1 , wherein the width of the interconnect site is less than 120% of a width of the conductive trace.
3. The method of claim 1 , wherein the width of the interconnect site is substantially equal to a width of the conductive trace.
4. The method of claim 1 , wherein the interconnect site has a generally rectangular, elongated, or rounded shape.
5. The method of claim 1 , wherein the interconnect structure includes a fusible portion and a non-fusible portion.
6. The method of claim 1 , wherein the interconnect structure includes a conductive pillar and a bump formed over the conductive pillar.
7. A method of making a semiconductor device, comprising:
providing a semiconductor die;
providing a substrate;
forming a conductive trace over the substrate including an interconnect site; and
forming an interconnect structure between the semiconductor die and the interconnect site including a width of the interconnect structure greater than a width of the conductive trace, wherein a width of the interconnect site is greater than 20% and less than 80% of a width of a contact interface between the interconnect structure and a contact pad formed over the semiconductor die.
8. The method of claim 7 , wherein the interconnect site has a generally rectangular, elongated, or rounded shape.
9. The method of claim 7 , wherein the interconnect structure includes a fusible portion and a non-fusible portion.
10. The method of claim 7 , wherein the interconnect structure includes a conductive pillar and a bump formed over the conductive pillar.
11. A semiconductor device, comprising:
a semiconductor die including a contact pad;
a substrate;
a conductive trace formed over the substrate including an interconnect site; and
an interconnect structure formed between the contact pad and the interconnect site and around the conductive trace, wherein the interconnect structure covers a first surface of the interconnect site and a second surface of the interconnect site noncoplanar with the first surface of the interconnect site and a width of the interconnect site is greater than 20% and less than 80% of a width of a contact interface between the interconnect structure and the contact pad.
12. The semiconductor device of claim 11 , wherein the width of the interconnect site is less than 120% of a width of the conductive traces.
13. The semiconductor device of claim 11 , wherein the interconnect site has a generally rectangular, elongated, or rounded shape.
14. The semiconductor device of claim 11 , wherein the interconnect structure includes a fusible portion and a non-fusible portion.
15. The semiconductor device of claim 11 , wherein the interconnect structure includes a conductive pillar and a bump formed over the conductive pillar.
16. A semiconductor device, comprising:
a semiconductor die including a contact pad;
a substrate;
a conductive trace formed over the substrate; and
an interconnect structure formed between the contact pad and an interconnect site on the conductive trace, wherein a width of the interconnect site is greater than 20% and less than 80% of a width of a contact interface between the interconnect structure and the contact pad.
17. The semiconductor device of claim 16 , wherein the interconnect structure covers a first surface of the interconnect site and a second surface of the interconnect site noncoplanar with the first surface of the interconnect site.
18. The semiconductor device of claim 16 , wherein the interconnect site has a generally rectangular, elongated, or rounded shape.
19. The semiconductor device of claim 16 , wherein the width of the interconnect site is less than 120% of a width of the conductive trace.
20. The semiconductor device of claim 16 , wherein the interconnect structure includes a fusible portion and a non-fusible portion.
21. The semiconductor device of claim 16 , wherein the interconnect structure includes a conductive pillar and a bump formed over the conductive pillar.
22. A semiconductor device, comprising:
a semiconductor die;
a substrate;
a conductive trace formed over the substrate including an interconnect site; and
an interconnect structure formed between the semiconductor die and the interconnect site including a width of the interconnect structure greater than a width of the conductive trace, wherein a width of the interconnect site is greater than 20% and less than 80% of a width of a contact interface between the interconnect structure and a contact pad formed over the semiconductor die.
23. The semiconductor device of claim 22 , wherein a width of the interconnect site is substantially equal to a width of the conductive trace.
24. The semiconductor device of claim 22 , wherein the interconnect site has a generally rectangular, elongated, or rounded shape.
25. The semiconductor device of claim 22 , wherein the interconnect structure includes a fusible portion and a non-fusible portion.
26. The semiconductor device of claim 22 , wherein the interconnect structure includes a conductive pillar and a bump formed over the conductive pillar.