IP Library Granted Patent US 8,143,103
Granted Patent B2
US 8,143,103 · App. 13/017,388 · Granted Mar 27, 2012

Package stacking system with mold contamination prevention and method for manufacturing thereof

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Quick Facts
Patent No.
US 8,143,103
App. No.
13/017,388
Granted
Mar 27, 2012
Kind
B2
Abstract

A method for manufacturing a package stacking system includes: providing a package substrate; mounting an integrated circuit over the package substrate; forming a step-down interposer over the integrated circuit; and molding a stack package body, having a step profile, on the package substrate and the step-down interposer.

Claims (18)

1. A method for manufacturing a package stacking system comprising:

providing a package substrate;

mounting an integrated circuit over the package substrate;

forming a step-down interposer over the integrated circuit, the step-down interposer including a pattern of external component contacts originating from a center of the step-down interposer; and

molding a stack package body, having a step profile, on the package substrate and the step-down interposer.

2. The method as claimed in claim 1 further comprising coupling an electrical interconnect between the package substrate and the step-down interposer.

3. The method as claimed in claim 1 further comprising coupling a flip chip integrated circuit to the step-down interposer.

4. The method as claimed in claim 1 further comprising coupling a first integrated circuit package to the step-down interposer.

5. The method as claimed in claim 1 further comprising coupling an oversized integrated circuit package to the step-down interposer.

6. A package stacking system comprising:

a package substrate;

an integrated circuit over the package substrate;

a step-down interposer over the integrated circuit, the step-down interposer including a pattern of external component contacts originating from a center of the step-down interposer; and

a stack package body, having a step profile, molded on the package substrate and the step-down interposer.

7. The system as claimed in claim 6 further comprising an electrical interconnect between the package substrate and the step-down interposer.

8. The system as claimed in claim 6 further comprising a flip chip integrated circuit coupled to the step-down interposer.

9. The system as claimed in claim 6 further comprising a first integrated circuit package coupled to the step-down interposer.

10. The system as claimed in claim 6 further comprising an oversized integrated circuit package coupled to the step-down interposer.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0474 ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 8, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064842/0046 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38378 FRAME: 0280) Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064789/0474 →
RELEASE OF SECURITY INTEREST Recorded Jun 9, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052879/0852 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0280 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →