IP Library Granted Patent US 8,476,135
Granted Patent B2
US 8,476,135 · App. 13/118,310 · Granted Jul 2, 2013

Integrated circuit packaging system with vertical interconnects and method of manufacture thereof

Inventors: JinGwan Kim (Seoul, KR); Hyunil Bae (Nonsan-si, KR)
Assignee: Stats Chippac Ltd.
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Quick Facts
Patent No.
US 8,476,135
App. No.
13/118,310
Granted
Jul 2, 2013
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a base carrier having a base carrier hole from a base carrier interconnection side to a base carrier device side; mounting a base integrated circuit over the base carrier; forming an encapsulation over the base carrier covering the base integrated circuit, the encapsulation having an encapsulation top side and having an encapsulation hole directly over the base carrier hole; and forming an interconnection structure as a single integral structure through the base carrier hole and the encapsulation hole, the interconnection structure directly on the encapsulation top side and directly on the base carrier interconnection side.

Claims (43)

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a base carrier having a base carrier hole from a base carrier interconnection side to a base carrier device side;

mounting a base integrated circuit over the base carrier;

forming an encapsulation over the base carrier covering the base integrated circuit, the encapsulation having an encapsulation top side and having an encapsulation hole directly over the base carrier hole; and

forming an interconnection structure as a single integral structure through the base carrier hole and the encapsulation hole, the interconnection structure directly on the encapsulation top side and directly on the base carrier interconnection side.

2. The method of manufacturing an integrated circuit packaging system according to claim 1 wherein forming the interconnection structure includes forming the interconnection structure having a structure bottom terminal extending from the base carrier interconnection side.

3. The method of manufacturing an integrated circuit packaging system according to claim 1 further comprising mounting a stack carrier over the base integrated circuit, the stack carrier having a stack carrier hole with the interconnection structure within the stack carrier hole.

4. The method of manufacturing an integrated circuit packaging system according to claim 1 further comprising:

mounting a stack carrier over the base integrated circuit, the stack carrier having a stack carrier pad; and wherein:

forming the interconnection structure includes forming the interconnection structure having a structure top terminal directly on the stack carrier pad.

5. The method of manufacturing an integrated circuit packaging system according to claim 1 wherein mounting the base integrated circuit includes mounting the base integrated circuit over the base carrier, the base integrated circuit electrically connected to the interconnection structure.

6. A method of manufacture of an integrated circuit packaging system comprising:

providing a base carrier having a base carrier hole from a base carrier interconnection side to a base carrier device side;

mounting a base integrated circuit over the base carrier;

attaching a base attach layer to the base integrated circuit and the base carrier;

forming an encapsulation over the base carrier covering the base integrated circuit, the encapsulation having an encapsulation top side and having an encapsulation hole directly over the base carrier hole; and

forming an interconnection structure as a single integral structure through the base carrier hole and the encapsulation hole, the interconnection structure directly on the encapsulation top side and directly on the base carrier interconnection side.

7. The method of manufacturing an integrated circuit packaging system according to claim 6 wherein forming the interconnection structure includes forming the interconnection structure having a structure central portion and having a structure bottom terminal extending from the base carrier interconnection side, the structure bottom terminal having a horizontal width greater than a horizontal width of the structure central portion.

8. The method of manufacturing an integrated circuit packaging system according to claim 6 further comprising mounting a stack carrier over the base integrated circuit, the stack carrier having a stack carrier interconnection side and a stack carrier hole with the interconnection structure extending from the stack carrier interconnection side and within the stack carrier hole.

9. The method of manufacturing an integrated circuit packaging system according to claim 6 further comprising:

mounting a stack carrier over the base integrated circuit, the stack carrier having a stack carrier device side and a stack carrier pad; and

attaching a stack integrated circuit to the stack carrier device side, the stack integrated circuit electrically connected to the interconnection structure; and wherein:

forming the interconnection structure includes forming the interconnection structure having a structure top terminal directly on the stack carrier pad.

10. The method of manufacturing an integrated circuit packaging system according to claim 6 wherein mounting the base integrated circuit includes mounting a flip chip over the base carrier, the flip chip electrically connected to the interconnection structure.

11. An integrated circuit packaging system comprising:

a base carrier having a base carrier hole from a base carrier interconnection side to a base carrier device side;

a base integrated circuit over the base carrier;

an encapsulation over the base carrier covering the base integrated circuit, the encapsulation having an encapsulation top side and having an encapsulation hole directly over the base carrier hole; and

an interconnection structure as a single integral structure through the base carrier hole and the encapsulation hole, the interconnection structure directly on the encapsulation top side and directly on the base carrier interconnection side.

12. The integrated circuit packaging system according to claim 11 wherein the interconnection structure includes a structure bottom terminal extending from the base carrier interconnection side.

13. The integrated circuit packaging system according to claim 11 further comprising a stack carrier over the base integrated circuit, the stack carrier having a stack carrier hole with the interconnection structure within the stack carrier hole.

14. The integrated circuit packaging system according to claim 11 further comprising:

a stack carrier over the base integrated circuit, the stack carrier having a stack carrier pad; and wherein:

the interconnection structure includes a structure top terminal directly on the stack carrier pad.

15. The integrated circuit packaging system according to claim 11 wherein the base integrated circuit is over the base carrier and electrically connected to the interconnection structure.

16. The integrated circuit packaging system according to claim 11 further comprising a base attach layer attached to the base integrated circuit and the base carrier.

17. The integrated circuit packaging system according to claim 16 wherein the interconnection structure includes the interconnection structure having a structure central portion and having a structure bottom terminal extending from the base carrier interconnection side, the structure bottom terminal having a horizontal width greater than a horizontal width of the structure central portion.

18. The integrated circuit packaging system according to claim 16 further comprising a stack carrier over the base integrated circuit, the stack carrier having a stack carrier interconnection side and a stack carrier hole with the interconnection structure extending from the stack carrier interconnection side and within the stack carrier hole.

19. The integrated circuit packaging system according to claim 16 further comprising:

a stack carrier over the base integrated circuit, the stack carrier having a stack carrier device side and a stack carrier pad; and

a stack integrated circuit attached to the stack carrier device side, the stack integrated circuit electrically connected to the interconnection structure; and wherein:

the interconnection structure includes a structure top terminal directly on the stack carrier pad.

20. The integrated circuit packaging system according to claim 16 wherein the base integrated circuit is a flip chip over the base carrier, the flip chip electrically connected to the interconnection structure.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0235. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0741 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0235 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2011
From: KIM, JINGWAN; BAE, HYUNIL
To: STATS CHIPPAC LTD.
Reel/Frame 026524/0036 →
Continuity (1)
Related Publication 20120299168A1 · Nov 29, 2012