IP Library Granted Patent US 8,513,057
Granted Patent B2
US 8,513,057 · App. 13/235,135 · Granted Aug 20, 2013

Integrated circuit packaging system with routable underlayer and method of manufacture thereof

Inventors: Oh Han Kim (Ichon-si, KR); Ki Youn Jang (Ichon-si, KR); DaeSik Choi (Seoul, KR); DongSoo Moon (Ichon-si, KR)
Assignee: Stats Chippac Ltd.
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Quick Facts
Patent No.
US 8,513,057
App. No.
13/235,135
Granted
Aug 20, 2013
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a routable layer having a column; mounting an integrated circuit structure in direct contact with the column; and forming a gamma connector to electrically connect the column to the integrated circuit structure.

Claims (59)

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a routable layer having a column;

mounting an integrated circuit structure in direct contact with the column; and

forming a gamma connector to electrically connect the column to the integrated circuit structure.

2. The method of manufacturing an integrated circuit packaging system according to claim 1 wherein forming the gamma connector includes:

forming a short via in direct contact with the integrated circuit structure;

forming a long via in direct contact with the column; and

forming a redistribution layer directly connecting between the short via and the long via.

3. The method of manufacturing an integrated circuit packaging system according to claim 1 further comprising:

forming an insulator mask above the gamma connector to expose a connection pad exposed from the insulator mask.

4. The method of manufacturing an integrated circuit packaging system according to claim 1 wherein providing the routable layer includes providing the routable layer having the column arranged in an array or staggered rows.

5. The method of manufacturing an integrated circuit packaging system according to claim 1 wherein:

providing the routable layer having the column includes providing the column having vertical sides; and

mounting the integrated circuit structure includes mounting the integrated circuit structure partially covered with a die attach adhesive there below, and the die attach adhesive surrounds the vertical sides near the integrated circuit structure yet leaves portions of the vertical sides exposed from the die attach adhesive.

6. A method of manufacture of an integrated circuit packaging system comprising:

providing a carrier;

forming a routable layer having a column to the carrier;

mounting an integrated circuit structure in direct contact with the column;

forming an encapsulation around the integrated circuit structure and the column;

forming gamma connector through and over the encapsulation to electrically connect the column to the integrated circuit structure; and

removing the carrier.

7. The method of manufacturing an integrated circuit packaging system according to claim 6 wherein:

forming the routable layer includes forming the column with vertical sides; and

forming the encapsulation includes forming the encapsulation surrounding part of the vertical sides yet leaves portions of the vertical sides exposed from the encapsulation.

8. The method of manufacturing an integrated circuit packaging system according to claim 6 wherein:

mounting the routable layer having the column includes providing the column having vertical sides, and

further comprising:

forming a bump in direct contact with the vertical sides of the column and in direct contact with the encapsulation.

9. The method of manufacturing an integrated circuit packaging system according to claim 6 further comprising mounting a top package to the gamma connector above the integrated circuit structure.

10. The method of manufacturing an integrated circuit packaging system according to claim 6 wherein:

forming the encapsulation includes forming the encapsulation having a top side and an opening exposing the integrated circuit structure; and further comprising:

mounting an external chip having an external active side in the opening with the external active side below the top side.

11. An integrated circuit packaging system comprising:

a routable layer having a column;

an integrated circuit structure mounted in direct contact with the column; and

a gamma connector formed to electrically connect the column to the integrated circuit structure.

12. The integrated circuit packaging system according to claim 11 wherein the gamma connector includes:

a short via in direct contact with the integrated circuit structure;

a long via in direct contact with the column; and

a redistribution layer directly connected between the short via and the long via.

13. The integrated circuit packaging system according to claim 11 further comprising:

an insulator mask above the gamma connector to expose a connection pad exposed from the insulator mask.

14. The integrated circuit packaging system according to claim 11 wherein the routable layer has the column arranged in an array or staggered rows.

15. The integrated circuit packaging system according to claim 11 wherein:

the column have vertical sides; and

further comprising:

a die attach adhesive surrounding the vertical sides near the integrated circuit structure yet leaving portions of the vertical sides exposed from the die attach adhesive.

16. The integrated circuit packaging system according to claim 11 further comprising:

an encapsulation around the integrated circuit structure and the column.

17. The integrated circuit packaging system according to claim 16 wherein:

the column have vertical sides; and

the encapsulation surrounds part of the vertical sides yet leaves portions of the vertical sides exposed from the encapsulation.

18. The integrated circuit packaging system according to claim 16 wherein:

the column have vertical sides; and further comprising:

a bump in direct contact with the vertical sides of the column and in direct contact with the encapsulation.

19. The integrated circuit packaging system according to claim 16 further comprising a top package mounted to the vias above the integrated circuit structure.

20. The integrated circuit packaging system according to claim 16 wherein:

the encapsulation has a top side and an opening exposing the integrated circuit structure; and further comprising:

an external chip having an external active side mounted in the opening with the external active side below the top side.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0235. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0741 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0235 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2011
From: KIM, OH HAN; JANG, KI YOUN; CHOI, DAESIK; MOON, DONGSOO
To: STATS CHIPPAC LTD.
Reel/Frame 027095/0612 →
Continuity (1)
Related Publication 20130069224A1 · Mar 21, 2013