Semiconductor device and method of forming RDL under bump for electrical connection to enclosed bump
View Patent ↗A semiconductor device has a semiconductor wafer with a plurality of semiconductor die. A first conductive layer is formed over a surface of the wafer. A first insulating layer is formed over the surface of the wafer and first conductive layer. A second conductive layer has first and second segments formed over the first insulating layer. A second insulating layer is formed over the first insulating layer and second conductive layer. A UBM layer is formed over the second insulating layer and the first segment of the second conductive layer. A first bump is formed over the UBM layer. The first bump is electrically connected to the second segment and electrically isolated from the first segment of the second conductive layer. A second bump is formed over the surface of the wafer and electrically connected to the first segment of the second conductive layer.
1. A method of making a semiconductor device, comprising:
providing a semiconductor wafer including a plurality of semiconductor die;
forming a first insulating layer over a surface of the semiconductor wafer;
forming a first conductive layer including a first segment passing between second and third segments of the first conductive layer over the first insulating layer;
forming a second insulating layer over the first insulating layer and first conductive layer;
forming a second conductive layer over the first conductive layer; and
forming a bump over the second conductive layer, wherein a portion of the second conductive layer below the bump directly contacts the second and third segments of the first conductive layer with the second insulating layer disposed between the first segment of the conductive layer and the bump.
2. The method of claim 1 , further including forming a third insulating layer over the surface of the semiconductor wafer.
3. The method of claim 1 , further including removing a portion of the first insulating layer by laser direct ablation.
4. The method of claim 1 , wherein the first segment of the first conductive layer is electrically isolated from the second conductive layer by the second insulating layer.
5. The method of claim 1 , wherein a portion of the second segment of the first conductive layer is coplanar with a surface of the first insulating layer.
6. The method of claim 1 , wherein the first segment of the first conductive layer includes a width of 15 micrometers.
7. A method of making a semiconductor device, comprising:
providing a semiconductor die;
forming a first insulating layer over a surface of the semiconductor die;
forming a first conductive layer including first, second, and third segments over the first insulating layer;
forming a second insulating layer over the first insulating layer and first conductive layer;
forming a second conductive layer over the second insulating layer; and
forming a bump over the second conductive layer, wherein a portion of the second conductive layer below the bump directly contacts the first and third segments of the first conductive layer.
8. The method of claim 7 , further including forming an interconnect structure over the surface of the semiconductor die electrically connected to the second segment of the first conductive layer.
9. The method of claim 7 , further including forming a third conductive layer over the surface of the semiconductor die.
10. The method of claim 7 , further including forming a third insulating layer over the surface of the semiconductor die.
11. The method of claim 7 , further including forming a third conductive layer over the semiconductor die.
12. The method of claim 7 , wherein a portion of the first segment of the first conductive layer is coplanar with a surface of the first insulating layer.
13. The method of claim 7 , wherein the second segment of the first conductive layer is electrically isolated from the second conductive layer by the second insulating layer.
14. A semiconductor device, comprising:
a semiconductor die;
a first conductive layer including first and second segments formed over the semiconductor die;
a first insulating layer formed over the first conductive layer; and
a first interconnect structure directly coupled to the first segment and second segment of the first conductive layer.
15. The semiconductor device of claim 14 , further including:
a third segment of the first conductive layer routed between the first and second segments of the first conductive layer; and
a second interconnect structure formed over a surface of the semiconductor die electrically connected to the third segment of the first conductive layer.
16. The semiconductor device of claim 14 , further including:
a second conductive layer formed over a surface of the semiconductor die; and
a second insulating layer formed over the surface of the semiconductor die and second conductive layer.
17. The semiconductor device of claim 14 , wherein the first interconnect structure further includes:
a second conductive layer formed over the first insulating layer and the first conductive layer; and
a bump formed over the second conductive layer.
18. The semiconductor device of claim 14 , further including a second insulating layer formed over the semiconductor die, wherein a portion of the first conductive layer is coplanar with a surface of the second insulating layer.
19. The semiconductor device of claim 15 , wherein the third segment of the first conductive layer is electrically isolated from the first interconnect structure by the first insulating layer.