Semiconductor device and method of providing Z-interconnect conductive pillars with inner polymer core

1. A semiconductor device, comprising:

a conductive layer;

a first conductive pillar with inner stress-relief core formed over the conductive layer;

a semiconductor die or component mounted over the conductive layer;

an encapsulant deposited around the semiconductor die or component and first conductive pillar;

a first interconnect structure formed over a first surface of the encapsulant, the first interconnect structure being electrically connected to the first conductive pillar; and

a second interconnect structure formed over a second surface of the encapsulant opposite the first interconnect structure, the second interconnect structure being electrically connected to the first conductive pillar.

2. The semiconductor device of claim 1 , further including a semiconductor device mounted over the first or second interconnect structure.

3. The semiconductor device of claim 1 , further including an integrated passive device formed in the first or second interconnect structure.

4. The semiconductor device of claim 3 , wherein the integrated passive device is configured to operate as a capacitor, resistor or inductor.

5. The semiconductor device of claim 1 , further including a second conductive pillar with inner stress-relief core formed over the semiconductor die or component.

6. A semiconductor device, comprising:

a conductive layer;

a first conductive z-interconnect structure including an inner stress-relief core formed over the conductive layer;

a semiconductor die or component mounted over the conductive layer;

an encapsulant deposited around the first conductive z-interconnect structure;

a first interconnect structure formed over a first surface of the encapsulant, the first interconnect structure being electrically connected to the first conductive z-interconnect structure; and

a second interconnect structure formed over a second surface of the encapsulant, the second interconnect structure being electrically connected to the first conductive z-interconnect structure.

7. The semiconductor device of claim 6 , further including a semiconductor device mounted over the first or second interconnect structure.

8. The semiconductor device of claim 6 , further including an integrated passive device formed in the first or second interconnect structure.

9. The semiconductor device of claim 8 , wherein the integrated passive device is configured to operate as a capacitor, resistor or inductor.

10. The semiconductor device of claim 6 , further including a second conductive z-interconnect structure including an inner stress-relief core formed over the semiconductor die or component.

11. The semiconductor device of claim 6 , wherein the first conductive z-interconnect structure includes a conductive pillar with inner stress-relief core or a metal-coated polymer ball.

12. The semiconductor device of claim 6 , further including a bond wire, conductive paste, stud bump, micro bump, or bump formed on the first or second interconnect structure.

13. A semiconductor device, comprising:

a conductive layer;

a first conductive z-interconnect structure including an inner stress-relief core formed over the conductive layer;

a first semiconductor die or component mounted over the conductive layer;

an encapsulant deposited around the first conductive z-interconnect structure; and

an interconnect structure formed over a surface of the encapsulant opposite the conductive layer, the interconnect structure being electrically connected to the first conductive z-interconnect structure.

14. The semiconductor device of claim 13 , further including a semiconductor device mounted over the interconnect structure.

15. The semiconductor device of claim 13 , further including an integrated passive device formed in the interconnect structure.

16. The semiconductor device of claim 15 , wherein the integrated passive device is configured to operate as a capacitor, resistor or inductor.

17. The semiconductor device of claim 13 , further including a second conductive z-interconnect structure including an inner stress-relief core formed over the first semiconductor die or component.

18. The semiconductor device of claim 13 , wherein the first conductive z-interconnect structure includes a conductive pillar with inner stress-relief core or a metal-coated polymer ball.

19. The semiconductor device of claim 13 , further including a second semiconductor die or component mounted over the conductive layer.

20. A semiconductor device, comprising:

a conductive layer;

a first conductive z-interconnect structure including an inner stress-relief core mounted over the conductive layer;

a first semiconductor die or component mounted over the conductive layer; and

an encapsulant disposed around the first conductive z-interconnect structure.

21. The semiconductor device of claim 20 , further including:

an interconnect structure formed over a surface of the encapsulant, the interconnect structure being electrically connected to the first conductive z-interconnect structure; and

a semiconductor device mounted over the interconnect structure.

22. The semiconductor device of claim 20 , further including an interconnect structure having an integrated passive device formed over a surface of the encapsulant, the interconnect structure being electrically connected to the first conductive z-interconnect structure.

23. The semiconductor device of claim 20 , further including a second conductive z-interconnect structure including an inner stress-relief core formed over the first semiconductor die or component.

24. The semiconductor device of claim 20 , wherein the first conductive z-interconnect structure includes a conductive pillar with inner stress-relief core or a metal-coated polymer ball.

25. The semiconductor device of claim 20 , further including a second semiconductor die or component mounted over the conductive layer.