IP Library Granted Patent US 9,099,455
Granted Patent B2
US 9,099,455 · App. 13/683,884 · Granted Aug 4, 2015

Semiconductor device and method of forming conductive posts embedded in photosensitive encapsulant

Inventors: Seng Guan Chow (Singapore, SG); Il Kwon Shim (Singapore, SG); Heap Hoe Kuan (Singapore, SG); Rui Huang (Singapore, SG)
Assignee: STATS ChipPAC, Ltd.
H01L23/49811H01L21/56H01L21/561H01L21/568H01L23/3128H01L23/3135H01L23/49816H01L23/49827H01L23/5389H01L24/18H01L24/97H01L24/48H01L25/105H01L2224/0401H01L2224/04105H01L2224/12105H01L2224/18H01L2224/48091H01L2224/73265H01L2224/97H01L2924/0103H01L2924/01013H01L2924/01029H01L2924/01033H01L2924/01047H01L2924/01073H01L2924/01078H01L2924/01079H01L2924/01082H01L2924/01322H01L2924/12041H01L2924/1306H01L2924/13091H01L2924/14H01L2924/1433H01L2924/15311H01L2924/19041H01L2924/30105
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Quick Facts
Patent No.
US 9,099,455
App. No.
13/683,884
Granted
Aug 4, 2015
Kind
B2
Abstract

A semiconductor package includes a post carrier having a base plate and plurality of conductive posts. A photosensitive encapsulant is deposited over the base plate of the post carrier and around the conductive posts. The photosensitive encapsulant is etched to expose a portion of the base plate of the post carrier. A semiconductor die is mounted to the base plate of the post carrier within the etched portions of the photosensitive encapsulant. A second encapsulant is deposited over the semiconductor die. A first circuit build-up layer is formed over the second encapsulant. The first circuit build-up layer is electrically connected to the conductive posts. The base plate of the post carrier is removed and a second circuit build-up layer is formed over the semiconductor die and the photosensitive encapsulant opposite the first circuit build-up layer. The second circuit build-up layer is electrically connected to the conductive posts.

Claims (58)

1. A method of making a semiconductor device, comprising:

providing a prefabricated substrate including a base plate and a plurality of conductive posts extending from the base plate;

disposing a photosensitive material over the base plate and around the conductive posts;

forming an opening in a first surface of the photosensitive material between the conductive posts; and

disposing a semiconductor die within the opening in the photosensitive material over the base plate of the prefabricated substrate.

2. The method of claim 1 , further including depositing an encapsulant over the semiconductor die within the opening in the photosensitive material.

3. The method of claim 1 , further including forming a first interconnect structure over the first surface of the photosensitive material.

4. The method of claim 3 , further including:

removing the base plate; and

forming a second interconnect structure over a second surface of the photosensitive material opposite the first surface of the photosensitive material.

5. The method of claim 1 , further including planarizing the photosensitive material to the semiconductor die.

6. The method of claim 1 , wherein the photosensitive material extends above the conductive posts.

7. A method of making a semiconductor device, comprising:

providing a copper substrate including a base plate and a plurality of conductive posts extending from the base plate;

disposing a first encapsulant over the base plate and around the conductive posts;

forming an opening in a surface of the first encapsulant between the conductive posts; and

disposing a semiconductor die within the opening in the first encapsulant over the base plate of the copper substrate.

8. The method of claim 7 , further including depositing a second encapsulant over the semiconductor die within the opening in the first encapsulant.

9. The method of claim 7 , further including forming a first interconnect structure over a first surface of the semiconductor die.

10. The method of claim 9 , further including:

removing the base plate; and

forming a second interconnect structure over a second surface of the semiconductor die opposite the first surface of the semiconductor die.

11. The method of claim 7 , further including planarizing the first encapsulant to the semiconductor die.

12. The method of claim 7 , wherein the first encapsulant extends above the conductive posts.

13. The method of claim 7 , wherein the first encapsulant includes a photosensitive material.

14. A semiconductor device, comprising:

a prefabricated substrate including a base plate and a plurality of conductive posts extending from the base plate;

a photosensitive material disposed over the base plate and around the conductive posts;

a semiconductor die disposed within an opening formed in a first surface of the photosensitive material over the base plate of the prefabricated substrate; and

an encapsulant deposited over the semiconductor die within the opening in the photosensitive material.

15. The semiconductor device of claim 14 , further including an interconnect structure formed over the first surface of the photosensitive material.

16. The semiconductor device of claim 14 , wherein the first surface of the photosensitive material is coplanar with a surface of the semiconductor die.

17. The semiconductor device of claim 14 , wherein the prefabricated substrate includes copper.

18. A semiconductor device, comprising:

a copper substrate including a base plate and a conductive post extending from the base plate;

a photosensitive material disposed over the base plate and around the conductive post; and

a semiconductor die disposed over the base plate of the copper substrate and within an opening extending from a first surface of the photosensitive material to a second surface of the photosensitive material opposite the first surface.

19. The semiconductor device of claim 18 , further including an encapsulant deposited over the semiconductor die within the opening in the photosensitive material.

20. The semiconductor device of claim 18 , further including an interconnect structure formed over the first surface of the photosensitive material.

21. The semiconductor device of claim 18 , wherein the first surface of the photosensitive material is coplanar with a surface of the semiconductor die.

22. The semiconductor device of claim 18 , wherein the photosensitive material extends above the conductive posts.

23. A semiconductor device, comprising:

a substrate including a base plate and a conductive post extending from the base plate;

a first encapsulant disposed over the base plate and around the conductive post; and

a semiconductor die disposed within an opening extending from a first surface of the first encapsulant to a second surface of the first encapsulant opposite the first surface.

24. The semiconductor device of claim 23 , further including a second encapsulant deposited over the semiconductor die within the opening in the first encapsulant.

25. The semiconductor device of claim 23 , further including an interconnect structure formed over a first surface of the semiconductor die.

26. The semiconductor device of claim 23 , wherein the surface of the first encapsulant is coplanar with a surface of the semiconductor die.

27. The semiconductor device of claim 23 , wherein the first encapsulant includes a photosensitive material.

28. The semiconductor device of claim 23 , wherein the substrate includes copper.

29. A semiconductor device, comprising:

a conductive post;

a photosensitive material disposed around the conductive post;

a semiconductor die disposed within an opening formed in a first surface of the photosensitive material; and

an encapsulant deposited over the semiconductor die.

30. The semiconductor device of claim 29 , further including a first interconnect structure formed over a first surface of the semiconductor die.

31. The semiconductor device of claim 30 , further including a second interconnect structure formed over a second surface of the semiconductor die opposite the first surface of the semiconductor die.

32. The semiconductor device of claim 29 , wherein the first surface of the photosensitive material is coplanar with a surface of the semiconductor die.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVERSHEET FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED ON REEL 038378 FRAME 0418. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064908/0920 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0418 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
Continuity (2)
Continuation 12329430 · Dec 5, 2008
Related Publication 20130075902A1 · Mar 28, 2013