Semiconductor device with die stack arrangement including staggered die and efficient wire bonding

1. A semiconductor device, comprising:

a substrate;

a first semiconductor die mounted on the substrate, an x-axis and a y-axis being defined parallel with orthogonal edges of the first semiconductor die;

a second semiconductor die mounted on top of the first semiconductor die, the second semiconductor die being offset along the x-axis with respect to the first semiconductor die, and the second semiconductor die being staggered along the y-axis with respect to the first semiconductor die; and

a third semiconductor die mounted on top of the second semiconductor die, the third semiconductor die being offset along the x-axis with respect to the second semiconductor die, and the third semiconductor die being staggered along the y-axis to align with the first semiconductor die along the y-axis.

2. The semiconductor device of claim 1 , further comprising a fourth semiconductor die mounted on top of the third semiconductor die, the fourth semiconductor die being offset along the x-axis with respect to the third semiconductor die, and the fourth semiconductor die being staggered along the y-axis to align with the second semiconductor die along the y-axis.

3. The semiconductor device of claim 2 , further comprising:

die bond pads on each of the first, second, third and fourth semiconductor die;

a first set of bond wires connecting corresponding die bond pads on the first and third semiconductor die with the substrate; and

a second set of bond wires connecting corresponding die bond pads on the second and fourth semiconductor die with the substrate.

4. The semiconductor device of claim 3 , wherein the first and second set of bond wires are interspersed with each other.

5. The semiconductor device of claim 3 , wherein at least one of the first and second sets of bonds wires are electrically insulated.

6. The semiconductor device of claim 1 , further comprising a controller die.

7. The semiconductor device of claim 1 , further comprising molding compound for encapsulating the first, second and third semiconductor die.

8. A semiconductor device, comprising:

a substrate;

a first group of two or more semiconductor die mounted on the substrate, each semiconductor die in the first group of semiconductor die having a first set of die bond pads, an x-axis and a y-axis being defined parallel to orthogonal edges of the semiconductor die in the first group of semiconductor die;

a second group of one or more semiconductor die mounted on the substrate, each semiconductor die in the second group of semiconductor die having a second set of die bond pads, semiconductor die from the first and second groups mounted on the substrate interspersed with each other, with semiconductor die from the first and second groups offset with respect to each other along the x-axis, and with semiconductor die from the first group staggered along the y-axis with respect to semiconductor die from the second group;

a first set of wire bonds electrically coupling corresponding die bond pads of the first set of die bond pads of the first group of die; and

a second set of wire bonds electrically coupling corresponding die bond pads of the second set of die bond pads of the second group of die, the first and second sets of wire bonds interspersed with each other.

9. The semiconductor device of claim 8 , wherein the first group of semiconductor die are aligned with each other along the y-axis.

10. The semiconductor device of claim 9 , wherein the second group of semiconductor die are aligned with each other along the y-axis.

11. The semiconductor device of claim 8 , wherein the first group of semiconductor die include four semiconductor die, and the second group of semiconductor die include four semiconductor die.

12. The semiconductor device of claim 11 , wherein the order of the die stacked atop each other for addressing purposes is die 0, die 4, die 1, die 5, die 2, die 6, die 3, die 7, with die 0, die 1, die 2 and die 3 belonging to the first group of semiconductor die, and die 4, die 5, die 6 and die 7 belonging to the second group of semiconductor die.

13. A semiconductor device including an irregular shaped edge, comprising:

a substrate having a contact pad adjacent to the irregular shaped edge;

a plurality of semiconductor die forming a die stack attached to the substrate, a lowermost semiconductor die attached directly to the substrate and remaining semiconductor die of the die stack attached to the lowermost semiconductor die;

a plurality of corresponding die bond pads, one on each of the plurality of semiconductor die, the plurality of corresponding die bond pads corresponding to each other on the plurality of semiconductor die;

a set of wire bonds electrically coupling the plurality of corresponding die bond pads to each other, the set of wire bonds including a wire bond to the substrate contact pad from a die bond pad of a semiconductor die above the lowermost semiconductor die, where a straight line between the die bond pad of the lowermost semiconductor die and the substrate contact pads includes a portion outside the irregular shaped edge of the semiconductor device.

14. The semiconductor device of claim 13 , wherein the semiconductor die having the die bond pad wire bonded to the substrate contact pad is the second die from the bottom of the die stack.

15. The semiconductor device of claim 13 , wherein the semiconductor die having the die bond pad wire bonded to the substrate contact pad is the third die from the bottom of the die stack.

16. The semiconductor device of claim 13 , wherein the semiconductor device comprises one of a microSD card and an MsMicro card.