IP Library Granted Patent US 9,823,734
Granted Patent B2
US 9,823,734 · App. 14/462,367 · Granted Nov 21, 2017

Instrumenting switch mode power supply to measure circuit power consumption

Inventors: Ingar Hanssen (Trondheim, NO); Frode Milch Pedersen (Trondheim, NO)
Assignee: Atmel Corporation
G06F1/3293G01R22/10H02M3/07H02M3/156H02M2001/0009H02M2001/0012
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Quick Facts
Patent No.
US 9,823,734
App. No.
14/462,367
Granted
Nov 21, 2017
Kind
B2
Abstract

A circuit includes a pulse generator coupled to a switch mode power supply. The switch mode power supply includes a switching component configured for transferring a charge to an energy storage component in response to pulses provided by the pulse generator. A pulse counter is coupled to the pulse generator or the switching component and configured to count pulses over a time period and thereby generate a pulse count. A converter coupled to the pulse counter is configured to generate a power measurement for the time period based on the pulse count. If the switch mode power supply has different modes of operation, a different counter may be used for each mode.

Claims (63)

1. A circuit comprising:

a pulse generator configured to generate pulses;

a switch mode power supply coupled to the pulse generator, the switch mode power supply including a switching component configured to transfer a charge to an energy storage component in response to pulses provided by the pulse generator;

an edge detector coupled to the pulse generator, the edge detector configured to detect an edge of each pulse and for generating a signal indicating the presence of each pulse;

a pulse counter coupled to the edge detector and configured to receive the signal and to count the pulses over a time period to thereby generate a pulse count; and

a converter coupled to the pulse counter and configured to generate a power measurement for the time period based on the pulse count.

2. The circuit of claim 1 , further comprising:

a current sink coupled to an output of the switch mode power supply and configured to add current to the circuit during a calibration sequence.

3. The circuit of claim 1 , further comprising:

an analog block included in the circuit and configured to be a current sink during a calibration sequence.

4. The circuit of claim 1 , where the switch mode power supply is a power converter configured to operate in pulse frequency modulation mode.

5. The circuit of claim 1 , where the switch mode power supply is a power converter configured to operate in pulse width modulation mode.

6. The circuit of claim 1 , where the switch mode power supply is a switched capacitor voltage regulator.

7. The circuit of claim 6 , further comprising a current source coupled to the switch mode power supply and configured to be enabled when a current peak results in an output voltage of the switch mode power supply drops below a voltage reference.

8. The circuit of claim 7 , further comprising:

a switch coupled to the current source and configured to turn the current source on or off;

a latch having an output coupled to the switch and configured to operating the switch; and

a comparator having inputs coupled to the output voltage of the switch mode power supply and the voltage reference and an output coupled to an input of the latch, the comparator configured to enable the latch when the output voltage drops below the voltage reference.

9. The circuit of claim 1 , further comprising a reference counter coupled to a clock and configured to count clock pulses to determine the time period.

10. The circuit of claim 1 , further comprising a register coupled to the pulse counter and configured to accumulate pulse counts over multiple time periods.

11. The circuit of claim 1 , further comprising a storage device coupled to the pulse counter and configured to store pulse counts.

12. A system comprising:

a pulse generator configured to generate pulses;

a switch mode power supply coupled to the pulse generator, the switch mode power supply including a switching component configured to transfer a charge to an energy storage component in response to pulses provided by the pulse generator;

an edge detector coupled to the pulse generator, the edge detector configured to detect an edge of each pulse and for generating a signal indicating the presence of each pulse;

a pulse counter coupled to the edge detector and configured to receive the signal and to count the pulses over a time period to thereby generate a pulse count;

a central processing unit; and

a bus coupled to the central processing unit and one or more registers storing the pulse count, where the central processing unit is operable in response to executing a set of stored instructions to access the pulse count over the system bus, to determine a system power consumption from the pulse count and to initiate a system power consumption reduction.

13. The circuit of claim 12 , where initiating the system power consumption reduction includes disabling one or more system modules or reducing a frequency of one or more system clocks.

14. A method of measuring power consumption, the method comprising:

generating, by a pulse generator, pulses for operating a switching component in a switch mode power supply of a circuit;

in response to the pulses, transferring a charge to an energy storage component of the circuit;

detecting, by an edge detector, an edge of each pulse;

generating, by the edge detector, a signal indicating the presence of each pulse;

counting, by a pulse counter coupled to the edge detector and configured to receive the signal, the pulses over a time period of time to thereby generate a pulse count; and

generating a power measurement for the time period based on the pulse count.

15. The method of claim 14 , where converting the pulse count into a power measurement includes converting relative power determined from the pulse count to absolute energy by differential calibration using a fixed current source as a load.

16. The method of claim 14 , further comprising:

adding current to the circuit by a current sink coupled to an output of the switch mode power supply during a calibration sequence.

17. The method of claim 14 , further comprising:

sinking current during a calibration sequence by an analog block included in the circuit.

18. The method of claim 14 , where the switch mode power supply is a power converter and the method further comprises configuring the power converter to operate in pulse frequency modulation mode.

19. The method of claim 14 , where the switch mode power supply is a power converter and the method further comprises configuring the power converter to operate in pulse width modulation mode.

20. The method of claim 14 , where the switch mode power supply is a switched capacitor voltage regulator and the method further comprises configuring the switched capacitor voltage regulator to transfer energy to a capacitive load in response to an oscillator output.

21. The method of claim 20 , further comprising:

configuring a constant current source to be enabled when a current peak results in an output voltage drops below a limit.

22. The method of claim 21 , further comprising:

configuring a switch coupled to the constant current source to turn the constant current source on or off;

configuring a latch having an output coupled to the switch to operate the switch; and

configuring a comparator having inputs coupled to the output voltage and a reference voltage and an output coupled to an input of the latch, to enable the latch when the output voltage drops below the voltage reference.

23. The method of claim 14 , further comprising counting clock pulses by a reference counter to determine the time period.

24. The method of claim 14 , further comprising:

detecting, by an edge detector, a rising edge of a pulse and for generating an enable signal indicating presence of a pulse.

25. The method of claim 14 , further comprising:

accumulating, by a register, pulse counts over multiple time periods.

26. The method of claim 14 , further comprising:

storing pulse counts, by a storage device coupled to a power trace port of the circuit.

27. The method of claim 14 , further comprising:

obtaining, by a processor of the circuit, the pulse counts;

determining power consumption of the circuit based on the pulse counts; and

configuring, by the processor, the circuit to implement one of a plurality of power

consumption strategies based on the determined power consumption.

28. The method of claim 27 , where configuring the circuit to implement one of a plurality of power consumption strategies includes disabling one or more modules of the circuit or reducing a frequency of one or more clocks on the circuit.

Assignments (17)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038375/0724 →
PATENT SECURITY AGREEMENT Recorded Nov 4, 2014
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 034160/0563 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 18, 2014
From: HANSSEN, INGAR; PEDERSEN, FRODE MILCH
To: ATMEL CORPORATION
Reel/Frame 033557/0440 →
Continuity (1)
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