IP Library Granted Patent US 9,846,672
Granted Patent B2
US 9,846,672 · App. 14/612,042 · Granted Dec 19, 2017

Serial device with configuration mode for changing device behavior

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Quick Facts
Patent No.
US 9,846,672
App. No.
14/612,042
Granted
Dec 19, 2017
Kind
B2
Abstract

Systems, methods, circuits, devices and computer-readable mediums for configuring serial devices are disclosed. In some implementations, a device comprises: an input for receiving first and second requests from a serial bus; a decoder coupled to the input and configured to determine if either of the first and second requests is a configuration mode request; a controller coupled to the decoder and configured to: in response to a determination that the first request is a configuration mode request, program a configuration block with configuration data obtained from the serial bus and alter a device behavior according to the configuration data; and in response to a determination that the second request is not a configuration mode request, perform one or more actions on the device according to the second request.

Claims (41)

1. A device, comprising:

an input configured for receiving a request from a serial bus;

a memory array including a configuration block;

the configuration block including:

a configuration register configured for storing first configuration data for configuring the device; and

one or more additional registers corresponding to one or more memory zones of the memory array, where the one or more additional registers are configured to store second configuration data that specify a write protection scheme of the corresponding one or more memory zones;

a decoder coupled to the input and configured to decode the request;

a controller coupled to the decoder and configured to:

in response to the decoded request, program the configuration block with configuration data obtained from the serial bus and alter a device behavior according to the configuration data.

2. The device of claim 1 , further comprising:

a sensor coupled to a supply voltage and the controller, the sensor configured to sense an under voltage condition of the device based on configuration data in the configuration block.

3. The device of claim 1 , further comprising:

a write protection control module coupled to the controller, the write protection control module configured to assert write protection on the memory array according to configuration data in the configuration block.

4. The device of claim 1 , where the configuration block is configured to report a device state to another device over the serial bus.

5. The device of claim 4 , where the device state indicates status of at least one of a memory access operation on the memory array, an error correcting operation or a count of error correction lifetime events with a monotonic counter.

6. The device of claim 1 , where the serial bus is compliant with Inter-Integrated Circuit (I 2 C) bus protocol.

7. A method of configuring a device, comprising:

receiving, by the device, a request from a serial bus;

determining, by a decoder circuit that the request is a configuration mode request;

in response to a determination that the first request is a configuration mode request:

programming, by the controller of the device, a configuration block with configuration data obtained from the serial bus and altering, by the controller of the device, device behavior according to the configuration data, the programming including storing first configuration data in a register of the configuration block of a memory array for configuring the device and second configuration in one or more additional registers of the device corresponding to one or more memory zones of the memory array, the second configuration data specifying a write protection scheme for the one or more memory zones.

8. The method of claim 7 , further comprising:

determining, by a sensor of the device, an under voltage condition of the device; and

implementing, by the controller of the device, an under voltage lock out on the device using configuration data in the configuration block.

9. The method of claim 7 , where the configuration block is configured to report a device state to another device over the serial bus.

10. The method of claim 9 , where the device state indicates status of at least one of a memory access operation, error correcting operation or a count of error correction lifetime events.

11. The method of claim 7 , further comprising:

asserting, by a write protection control module of the device, write protection on the memory array according to configuration data in the configuration block.

12. The method of claim 7 , where the serial bus is compliant with Inter-Integrated Circuit (I 2 C) bus protocol.

13. A non-transitory, computer-readable storage medium having instructions stored thereon, which, when executed by one or more processors of a device, causes the one or more processors of the device to perform operations comprising:

receiving, by the device, a request from a serial bus;

determining, by a decoder circuit of the device that the request is a configuration mode request;

in response to a determination that the request is a configuration mode request:

programming, by a controller of the device, a configuration block with configuration data obtained from the serial bus and altering, by the controller of the device, device behavior according to the configuration data, the programming including storing first configuration data in a register of the configuration block of a memory array for configuring the device and second configuration in one or more additional registers of the device corresponding to one or more memory zones of the memory array, the second configuration data specifying a write protection scheme for the one or more memory zones.

14. The non-transitory, computer-readable storage medium of claim 13 , further comprising:

determining, by a sensor of the device, an under voltage condition of the device; and

implementing, by the one or more processors of the device, an under voltage lock out on the device using configuration data in the configuration block.

15. The non-transitory, computer-readable storage medium of claim 13 , where the configuration block is configured to report device state information to another device over the serial bus.

16. The non-transitory, computer-readable storage medium of claim 13 , further comprising:

asserting, by a write protection control module of the device, write protection on the memory array according to configuration data in the configuration block.

17. The non-transitory, computer-readable storage medium of claim 15 , where the device state indicates status of at least one of a memory access operation, error correcting operation or a count of error correction lifetime events.

Assignments (16)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
PATENT SECURITY AGREEMENT Recorded Jun 16, 2015
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC., AS ADMINISTRATIVE AGENT, ISSUING BANK AND SWINGLINE LENDER
Reel/Frame 035918/0451 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2015
From: HARFERT, DANIEL; DE CARO, RICHARD V.
To: ATMEL CORPORATION
Reel/Frame 034875/0507 →