Copper feature design for warpage control of substrates
An approach is provided in which a laminate substrate includes top layers, bottom layers, and a core layer. The top layers are positioned between the core layer and a top surface metallurgy (TSM) layer and include at least one top conductive layer. The bottom layers are positioned between the core layer and a bottom surface metallurgy (BSM) layer and include at least one bottom conductive layer includes a material void pattern that is based upon the top conductive layer and reduces warpage of the laminate substrate.
1. A method comprising:
retrieving a first layer design and a second layer design, the first layer design corresponding to a first conductive layer included in a laminate substrate and the second layer design corresponding to a second conductive layer included in the laminate substrate;
identifying a first conductive material pattern in the first layer design;
selecting a material void pattern based upon the first conductive material pattern; and
including the selected material void pattern in the second layer design that removes a portion of conductive material from the second conductive layer, wherein the inclusion of the selected material void pattern reduces warpage of the laminate substrate.
2. The method of claim 1 further comprising:
computing a first layer bending resistance value and a second layer bending resistance value, the first layer bending resistance value based upon the first layer design and the second layer bending resistance value based upon the second layer design;
computing a bending resistance differential based upon the first layer bending resistance value and the second layer bending resistance value;
determining that the bending resistance differential exceeds a threshold; and
generating the material void pattern in response to determining that the bending resistance differential exceeds the threshold.
3. The method of claim 2 wherein the first layer bending resistance value includes a directional bending resistance component based upon one or more wiring patterns included in the first layer design.
4. The method of claim 3 wherein the material void pattern is based upon at least one of the one or more wiring patterns.
5. The method of claim 1 wherein the second conductive layer is selected from the group consisting of a power layer and a ground layer, and wherein the removal of the conductive material creates one or more non-contiguous conductive areas on the second conductive layer.
6. The method of claim 1 wherein the material void pattern is a channel pattern that forms one or more non-contiguous shapes.
7. The method of claim 6 wherein the channel pattern includes straight lines that forms the one or more non-contiguous shapes.
8. A product made by a method comprising:
retrieving a first layer design and a second layer design, the first layer design corresponding to a first conductive layer included in a laminate substrate and the second layer design corresponding to a second conductive layer included in the laminate substrate;
identifying a first conductive material pattern in the first layer design;
selecting a material void pattern based upon the first conductive material pattern; and
including the selected material void pattern in the second layer design, wherein the material void pattern is adapted to remove a portion of conductive material from the second conductive layer and reduce warpage of the laminate substrate.
9. The product of claim 8 the material void pattern fails to change electrical connectivity between a plurality of nodes included in the second layer design.
10. The product of claim 8 wherein the material void pattern is based upon a wiring pattern included in the first layer design.
11. The product of claim 8 wherein the material void pattern is a channel pattern that forms one or more non-contiguous shapes.