Semiconductor device with first and second chips and connections thereof and a manufacturing method of the same
In a non-insulated DC-DC converter having a circuit in which a power MOS⋅FET high-side switch and a power MOS⋅FET low-side switch are connected in series, the power MOS⋅FET low-side switch and a Schottky barrier diode to be connected in parallel with the power MOS⋅FET low-side switch are formed within one semiconductor chip. The formation region SDR of the Schottky barrier diode is disposed in the center in the shorter direction of the semiconductor chip, and on both sides thereof, the formation regions of the power MOS⋅FET low-side switch are disposed. From the gate finger in the vicinity of both long sides on the main surface of the semiconductor chip toward the formation region SDR of the Schottky barrier diode, a plurality of gate fingers are disposed so as to interpose the formation region SDR between them.
1. A semiconductor device including a DC-DC converter, comprising:
first and second die pads;
a lead arranged near the second die pad than the first die pad;
a first semiconductor chip formed over the first die pad and electrically connected with the first die pad;
a second semiconductor chip formed over the second die pad and electrically connected with the second die pad; and
a driver chip configured to control the first and second semiconductor chips,
wherein the first semiconductor chip includes a first MOSFET having a first gate electrode, a first source and a first drain,
wherein the second semiconductor chip includes a schottky barrier diode and a plurality of power MOSFETs which are formed on a semiconductor substrate,
wherein the semiconductor substrate includes a first long side, a second long side located on the opposite side of the first long side, a first short side and a second short side located on the opposite side of the first short side,
wherein the schottky barrier diode is formed in a first region of the semiconductor substrate and includes an anode electrode and a cathode electrode,
wherein the plurality of power MOSFETs are formed in a plurality of second regions of the semiconductor substrate and respectively include a second gate electrode, a second source and a second drain,
wherein a first gate metal electrically connected with the first gate electrode and a first source metal electrically connected with the first source are formed over a top surface of the first semiconductor chip,
wherein a first drain electrode electrically connected with the first drain is formed over a rear surface of the first semiconductor chip,
wherein a second gate metal is formed over the semiconductor substrate, is electrically connected to the second gate electrodes and surrounds the first region and the second regions in a planar view,
wherein a plurality of gate fingers are unified with the first metal layer, are extending to a direction along the first short side and are arranged between each of the second regions,
wherein a second source metal is formed over the first region and the second regions and is electrically connected to the second sources and the anode electrode,
wherein a second drain electrode electrically connected with the second drains is formed over a rear surface of the second semiconductor chip,
wherein the driver chip includes a first electrode pad and a second electrode pad,
wherein the first electrode pad and the first gate metal are electrically connected by a first wire,
wherein the second electrode pad and the second gate metal are electrically connected by a second wire,
wherein the first source metal and the second die pad are electrically connected by a first metal sheet,
wherein the second source metal and the lead are electrically connected by a second metal sheet, and
wherein a length along the first long side of the first region is larger than a length along the first short side of the first region.
2. The semiconductor device according to claim 1 ,
wherein the second semiconductor chip has a first long side, a second long side, a first short side and a second short side, and
wherein the lead is arranged along a first long side and a first short side.
3. The semiconductor device according to claim 2 ,
wherein the first semiconductor chip has a third long side, a fourth long side, a third short side and a fourth short side, and
wherein the first, second, third and fourth long sides are parallel.
4. The semiconductor device according to claim 1 ,
wherein the first source metal and the first metal sheet are connected by a first bump,
wherein the first metal sheet and the second die pad are connected by a second bump,
wherein the second source metal and the second metal sheet are connected by a third bump, and
wherein the second metal sheet and the lead are connected by a fourth bump.