IP Library › Assignment 008454/0101
Patent Assignment
Reel/Frame 008454/0101

Security Interest

Recorded: 1997-03-21 Pages: 30
Assignor
Assignee
BANKERS TRUST COMPANY
130 LIBERTY STREET, NEW YORK, NEW YORK, 10006
Covered Properties (140)
Transistor Logic Tristate Output with Feedback
Patent: 4,255,670 →
Application: 06/005,928 →
Transistor Logic Tristate Output with Reduced Power Dissipation
Patent: 4,287,433 →
Application: 06/005,929 →
Transistor Logic Output for Reduced Power Consumption and Increased Speed During Low to High Transition
Patent: 4,321,490 →
Application: 06/034,380 →
Eprom Reliability Test Circuit
Patent: 4,253,059 →
Application: 06/039,096 →
Transistor Logic Tristate Device with Reduced Output Capacitance
Patent: 4,311,927 →
Application: 06/058,674 →
Self-Aligned Floating Gate Memory Cell and Method of Manufacture
Patent: 4,272,774 →
Application: 06/059,235 →
Transistor Logic Output Device for Diversion of Miller Current
Patent: 4,330,723 →
Application: 06/065,991 →
Apparatus for Measuring Deflection of a Blade Upon Application of Force Thereto
Patent: 4,300,398 →
Application: 06/099,963 →
Data Latch with Enable Signal Gating
Patent: 4,334,157 →
Application: 06/123,717 →
Method of Manufactrue for Self-Aligned Floating Gate Memory Cell
Patent: 4,355,455 →
Application: 06/207,653 →
Electrically Erasable Programmable Read-Only Memory
Patent: 4,377,857 →
Application: 06/207,859 →
Adaptive Word Line Pull Down
Patent: 4,357,687 →
Application: 06/215,298 →
Method for Operating a Speech Recognition Device
Patent: 4,423,291 →
Application: 06/231,452 →
Automatic Self-Adjusting Processing Apparatus
Patent: 4,364,977 →
Application: 06/280,597 →
Random Access Memory Dual Word Line Recovery Circuitry
Patent: 4,393,476 →
Application: 06/282,767 →
Random Access Memory Preset Circuitry
Patent: 4,393,473 →
Application: 06/282,893 →
Method of Making an Integrated Circuit Bipolar Memory Cell
Patent: 4,488,350 →
Application: 06/315,678 →
Bit Line Powered Translinear Memory Cell
Patent: 4,442,509 →
Application: 06/315,679 →
Self-Refreshing Memory Cell
Patent: 4,435,786 →
Application: 06/324,344 →
Semiconductor Memory Core Programming Circuit
Patent: 4,445,205 →
Application: 06/334,695 →
Semiconductor Memory Core Program Control Circuit
Patent: 4,441,172 →
Application: 06/334,697 →
Semiconductor Memory Byte Clear Circuit
Patent: 4,442,510 →
Application: 06/334,698 →
Memory Core Testing System
Patent: 4,519,076 →
Application: 06/334,699 →
Current Dump Circuit for Bipolar Random Access Memories
Patent: 4,477,885 →
Application: 06/340,145 →
Molded Plating Mask
Patent: 4,404,080 →
Application: 06/360,742 →
Bipolar Memory Cell
Patent: 4,543,595 →
Application: 06/380,184 →
Synchronous Sense Amplifier
Patent: 4,484,311 →
Application: 06/387,111 →
Power Supply Threshold Activation Circuit
Patent: 4,481,430 →
Application: 06/404,318 →
Plating Control System
Patent: 4,469,723 →
Application: 06/438,107 →
Solid-Electrolyte Cell
Patent: 4,496,638 →
Application: 06/480,313 →
Method and Apparatus for Forming Ball Bonds
Patent: 4,594,493 →
Application: 06/517,190 →
Internal High Voltage (Vpp) Regulator for Integrated Circuits
Patent: 4,581,672 →
Application: 06/528,018 →
Low Impedance Package for Integrated Circuit Die
Patent: 4,680,613 →
Application: 06/557,119 →
Circuit and Method for Split Bias Enable/Inhibit Memory Operation
Patent: 4,578,594 →
Application: 06/573,532 →
Ttl Tristate Device with Reduced Output Capacitance
Patent: 4,581,550 →
Application: 06/586,671 →
Multiple Phase-Splitter Ttl Output Circuit with Improved Drive Characteristics
Patent: 4,661,727 →
Application: 06/632,433 →
Integrated Circuit Bipolar Memory Cell
Patent: 4,622,575 →
Application: 06/647,315 →
Apparatus for Feeding Bonding Wire
Patent: 4,685,631 →
Application: 06/697,833 →
Ttl Circuits Generating Complementary Signals
Patent: 4,649,297 →
Application: 06/704,375 →
Emitter Coupled Logic to Transistor Transistor Logic Translator
Patent: 4,677,320 →
Application: 06/729,552 →
Transistor Transistor Ligic to Emitter Coupled Logic Translator
Patent: 4,654,549 →
Application: 06/741,007 →
Door Opener
Patent: 4,624,076 →
Application: 06/744,577 →
Temperature Compensated Sense Amplifier
Patent: 4,727,269 →
Application: 06/766,865 →
Variable Clamped Memory Cell
Patent: 4,745,580 →
Application: 06/872,292 →
Memory Cell with Separate Read and Write Paths and Clamping Transistors
Patent: 5,016,214 →
Application: 07/003,114 →
Ttl to Ecl Translator
Patent: 4,771,191 →
Application: 07/010,356 →
Expandable Multi-Port Random Access Memory
Patent: 4,817,051 →
Application: 07/069,155 →
Adjustable Shipping Tray
Patent: 4,798,305 →
Application: 07/120,881 →
Ttl Circuit with Increased Transient Drive
Patent: 4,868,424 →
Application: 07/124,971 →
Bicmos Write-Recovery Circuit
Patent: 4,926,383 →
Application: 07/151,377 →
Ttl Current Sinking Circuit with Transient Performance Enhancement During Output Transition from High to Low
Patent: 4,947,058 →
Application: 07/202,237 →
Temperature Compensated Bipolar Circuits
Patent: 4,853,646 →
Application: 07/221,322 →
Two-Level Ecl Multiplexer Without Emitter Dotting
Patent: 4,963,767 →
Application: 07/236,567 →
Low Noise Integrated Circuit and Leadframe
Patent: 5,065,224 →
Application: 07/243,195 →
Novel Architecture for a Flash Erase Eeprom Memory
Patent: 4,999,812 →
Application: 07/275,380 →
Schottky Barrier Diode for Alpha Particle Resistant Static Random Access Memories
Patent: 4,903,087 →
Application: 07/286,818 →
Ecl Eprom with Cmos Programming
Patent: 5,075,885 →
Application: 07/287,980 →
Non-Current Hogging Dual Phase Splitter Ttl Circuit
Patent: 4,958,090 →
Application: 07/320,281 →
Anti-Noise Circuits
Patent: 5,049,763 →
Application: 07/327,348 →
High Speed Ecl/Cml to Ttl Translator Circuit
Patent: 4,988,898 →
Application: 07/352,169 →
Output Buffer for Reducing Switching Induced Noise
Patent: 4,961,010 →
Application: 07/355,509 →
Ecl/Cml Emitter Follower Current Switch Circuit
Patent: 4,943,741 →
Application: 07/356,785 →
Apparatus and Method for Detecting Vertically Propagated Defects in Integrated Circuits
Patent: 5,051,690 →
Application: 07/357,546 →
High Voltage Power Ic Process
Patent: 4,908,328 →
Application: 07/361,894 →
Ecl/Cml Pseudo-Rail Circuit, Cutoff Driver Circuit, and Latch Circuit
Patent: 4,945,265 →
Application: 07/379,088 →
Ttl to Ecl/Cml Translator Circuit
Patent: 5,013,941 →
Application: 07/395,259 →
Ttl to Ecl/Cml Translator Circuit with Differential Output
Patent: 4,945,263 →
Application: 07/397,769 →
Ecl Clamped Cutoff Driver Circuit
Patent: 5,025,179 →
Application: 07/407,544 →
Ecl Cutoff Driver Circuit with Reduced Stanby Power Dissipation
Patent: 5,013,938 →
Application: 07/430,431 →
Ttl/Ecl Translator Circuit
Patent: 5,045,729 →
Application: 07/436,842 →
Ecl/Ttl Tristate Buffer
Patent: 4,996,452 →
Application: 07/436,846 →
Master Slave Voltage Reference Circuit
Patent: 4,931,665 →
Application: 07/436,940 →
Ecl Circuit for Resistance and Temperature Bus Drop Compensation
Patent: 5,029,280 →
Application: 07/442,041 →
Asynchronous Priority Select Logic
Patent: 5,051,986 →
Application: 07/444,628 →
Ttl Gate Current Source Controlled Overdrive and Clamp Circuit
Patent: 4,988,899 →
Application: 07/450,826 →
High Speed Inverting Hysteresis Ttl Buffer Circuit
Patent: 5,021,687 →
Application: 07/473,533 →
Output Buffer Circuit with Signal Feed Forward for Reducing Switching Induced Noise
Patent: 5,081,374 →
Application: 07/483,927 →
Output Buffer Circuit with Output Voltage Sensing for Reducing Switching Induced Noise
Patent: 5,036,222 →
Application: 07/483,931 →
Self Powered Servo Actuated Backpressure Regulating Valve
Patent: 4,971,104 →
Application: 07/486,368 →
Machine for Counting Ic Parts in a Shipping Rail
Patent: 5,041,721 →
Application: 07/497,864 →
Ttl to Cmos Translating Circuits Without Static Current
Patent: 5,087,841 →
Application: 07/508,283 →
Skew Clamp
Patent: 5,032,743 →
Application: 07/521,215 →
Individual Bit Line Recovery Circuits
Patent: 5,058,067 →
Application: 07/533,978 →
Ttl Tristate Circuit for Output Pulldown Transistor
Patent: 5,051,623 →
Application: 07/537,903 →
Monophase Logic
Patent: 5,061,864 →
Application: 07/540,214 →
High Speed Ttl Buffer Circuit and Line Driver
Patent: 5,034,632 →
Application: 07/540,641 →
Tristate Circuits with Fast and Slow Oe Signals
Patent: 5,118,974 →
Application: 07/555,718 →
High Speed Anti-Undershoot and Anti-Overshoot Circuit
Patent: 5,103,118 →
Application: 07/615,077 →
Mechanically Compliant High Frequency Electrical Connector
Patent: 5,092,774 →
Application: 07/639,586 →
Ecl to Ttl Translator Circuit with Improved Slew Rate
Patent: 5,101,124 →
Application: 07/639,793 →
Pin Electronics Test Circuit for Ic Device Testing
Patent: 5,101,153 →
Application: 07/639,823 →
Synchronous Counter Terminal Count Output Circuit
Patent: 5,134,315 →
Application: 07/652,588 →
Ttl Output Buffer with Temperature Compensated Voh Clamp Circuit
Patent: 5,153,456 →
Application: 07/678,743 →
High Speed Passgate, Latch and Flip-Flop Circuits
Patent: 5,132,577 →
Application: 07/684,043 →
Structure of Dispensing Hopper for Paper Roll Holder
Patent: 5,141,171 →
Application: 07/721,419 →
Transceiver with Isolated Power Rails for Ground Bounce Reduction
Patent: 5,173,621 →
Application: 07/728,988 →
Short Circuit Protection Circuit and Method for Output Buffers
Patent: 5,256,914 →
Application: 07/771,400 →
Single Level Bipolar Ecl Flip Flop
Patent: 5,220,212 →
Application: 07/775,796 →
Ecl/Ttl Translator Circuit
Patent: 5,227,680 →
Application: 07/790,606 →
Bicmos Ttl Output Buffer Circuit with Reduced Power Dissipation
Patent: 5,218,243 →
Application: 07/796,455 →
Partial Isolation of Power Rails for Output Buffer Circuits
Patent: 5,204,554 →
Application: 07/802,747 →
Bicmos Output Buffer Noise Reduction Circuit
Patent: 5,233,237 →
Application: 07/803,466 →
State-Dependent Discharge Path Circuit
Patent: 5,184,034 →
Application: 07/804,906 →
Method of Making Alternate Metal/Source Virtual Ground Flash Eprom Cell Array
Patent: 5,346,842 →
Application: 07/830,938 →
Solder Finishing Planar Leaded Flat Package Integrated Circuit Leads
Patent: 5,248,520 →
Application: 07/835,208 →
Ttl to Cmos Translating Input Buffer Circuit with Dual Thresholds for High Dynamic Current and Low Static Current
Patent: 5,256,916 →
Application: 07/838,394 →
Wafer Level Reliability Contact Test Structure and Method
Patent: 5,239,270 →
Application: 07/840,390 →
Fault Locator Architecture and Method for Memories
Patent: 5,357,471 →
Application: 07/856,004 →
Ac Miller-Killer Circuit for L-Z Transitions
Patent: 5,258,665 →
Application: 07/881,540 →
Modified Interface for Parallel Access Eprom
Patent: 5,367,645 →
Application: 07/897,913 →
Bicmos Input Buffer Circuit with Integral Passgate
Patent: 5,289,056 →
Application: 07/898,029 →
Power Down Miller Killer Circuit
Patent: 5,223,745 →
Application: 07/930,471 →
Icct Leakage Current Interrupter
Patent: 5,331,224 →
Application: 07/932,354 →
Source-Coupling, Split-Gate, Virtual Ground Flash Eeprom Array
Patent: 5,412,238 →
Application: 07/941,745 →
Asymmetrical Alternate Metal Virtual Ground Eprom Array
Patent: 5,379,254 →
Application: 07/963,985 →
Low Power Low Temperature Ecl Output Driver Circuit
Patent: 5,323,068 →
Application: 07/977,812 →
Method of Fabricating Field Oxide Isolation for a Contactless Flash Eprom Cell Array
Patent: 5,371,030 →
Application: 08/009,330 →
Configurable Integrated Circuit Having True and Shadow Eprom Registers
Patent: 5,497,475 →
Application: 08/014,311 →
Full Swing Power Down Buffer Circuit with Multiple Power Supply Isolation
Patent: 5,338,978 →
Application: 08/016,009 →
Overvoltage Tolerant Output Buffer Circuit
Patent: 5,381,061 →
Application: 08/024,942 →
Magazine and Shipping Tray for Lead Frames
Patent: 5,310,055 →
Application: 08/037,516 →
Process-, Temperature-, and Voltage-Compensation for Ecl Delay Cells
Patent: 5,359,301 →
Application: 08/037,929 →
Ecl Test Access Port with Low Power Control
Patent: 5,379,302 →
Application: 08/042,127 →
Vcc Translator Circuit
Patent: 5,408,147 →
Application: 08/116,920 →
Buffer Protection Against Output-Node Voltage Excursions
Patent: 5,455,732 →
Application: 08/122,232 →
Circuit for Reducing Transient Simultaneous Conduction
Patent: 5,418,474 →
Application: 08/126,914 →
Method of Controlling Oxide Thinning in an Eprom or Flash Memory Array
Patent: 5,397,725 →
Application: 08/144,677 →
High Power, Edge Controlled Output Buffer
Patent: 5,489,861 →
Application: 08/170,511 →
Novel Row Decoder and Driver with Switched-Bias Bulk Regions
Patent: 5,365,479 →
Application: 08/206,446 →
Increased-Density Flash Eprom That Utilizes a Series of Planarized, Self-Aligned, Intermediate Strips of Conductive Material to Contact the Drain Regions
Application: 08/207,858 →
Bicmos Electrostatic Discharge Protection Circuit
Patent: 5,521,789 →
Application: 08/213,661 →
Photolithographic Process for Reducing Repeated Defects
Patent: 5,482,819 →
Application: 08/223,255 →
Multiple Differential Input Ecl or/nor Gate
Patent: 5,463,332 →
Application: 08/279,035 →
Memory with Multiple Erase Modes
Patent: 5,517,453 →
Application: 08/306,454 →
A Method for Fabricating an Ultra-High-Density Alternate Metal Virtual Ground Rom
Patent: 5,449,633 →
Application: 08/327,319 →
Flash Eeprom Memory System for Low Voltage Operation and Method
Patent: 5,602,775 →
Application: 08/404,510 →
Secure Non-Volatile Memory Array
Patent: 5,576,988 →
Application: 08/430,017 →
Flash Memory Having Segmented Array for Improved Operation
Patent: 5,646,886 →
Application: 08/449,564 →
Series-Gated Emitter-Coupled Logic Circuit Providing Closely Spaced Output Voltages
Patent: 5,508,642 →
Application: 08/472,071 →
Method for Detecting Read Errors, Correcting Single-Bit Read Errors and Reporting Multiple-Bit Read Errors
Patent: 5,721,739 →
Application: 08/572,070 →
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignors Interest. Aug 18, 1980
From: FERRIS DAVID A.
To: FAIR CHILD CAMERA & INSTRUMENT CORPORATION A CORP. OF DE.
Reel/Frame 003791/0936 →
Assignment of Assignors Interest. Nov 18, 1980
From: TICKLE ANDREW C.
To: FAIRCHILD CAMERA AND INSTRUMENT CORPORATION, A CORP. OF DE.
Reel/Frame 003831/0917 →
Assignment of Assignors Interest. Dec 11, 1980
From: RUFFORD ROGER V.
To: FAIRCHILD CAMERA AND INSTRUMENT CORPORATION
Reel/Frame 003843/0897 →
Assignment of Assignors Interest. Feb 4, 1981
From: ZWICKER EBERHARD; DAXER WOLFGANG
To: SIEMENS AKTIENGESELLSCHAFT, A CORP. OF GERMANY
Reel/Frame 003866/0118 →
Assignment of Assignors Interest. Apr 6, 1981
From: KALTENEKKER BELA; LOOFBOURROW WILLIAM L.
To: FAIRCHILD CAMERA AND INSTRUMENT CORPORATION
Reel/Frame 003843/0388 →
Assignment of Assignors Interest. Jun 12, 1981
From: BECHDOLT ROBERT W.
To: FAIRCHILD CAMERA AND INSTRUMENT CORPORATION, A CORP. OF DE.
Reel/Frame 003860/0539 →
Assignment of Assignors Interest. Jul 6, 1981
From: BERNARDI, CARL E.
To: NATIONAL SEMICONDUCTOR
Reel/Frame 003899/0649 →
Assignment of Assignors Interest. Jul 13, 1981
From: ONG, WARREN R.
To: FAIRCHILD CAMERA AND INSTRUMENT CORPORATION
Reel/Frame 003900/0780 →
Assignment of Assignors Interest. Jul 27, 1981
From: FERRIS DAVID A.
To: FAIRCHILD CAMERA AND INSTRUMENT CORPORATION
Reel/Frame 003885/0045 →
Assignment of Assignors Interest. Oct 27, 1981
From: VORA, MAKHUKAR B.; HERNDON, WILLIAM H.
To: FAIRCHILD CAMERA AND INSTRUMENT CORPORATION, A CORP. OF DE.
Reel/Frame 003942/0912 →
Assignment of Assignors Interest. Oct 27, 1981
From: HERNDON, WILLIAM H.
To: FAIRCHILD CAMERA AND INSTRUMENT CORPORATION, A CORP. OF DE.
Reel/Frame 003942/0914 →
Assignment of Assignors Interest. Nov 9, 1981
From: RUFFORD, ROGER V.
To: FAIRCHILD CAMERA AND INSTRUMENT CORPORATION
Reel/Frame 003925/0570 →
Assignment of Assignors Interest. Nov 23, 1981
From: TICKLE, ANDREW C.
To: FAIRCHILD CAMERA AND INSTRUMENT CORPORATION, A CORP. OF DE.
Reel/Frame 003955/0052 →
Assignment of Assignors Interest. Dec 28, 1981
From: EBEL, MARK S.
To: NATIONAL SEMICONDUCTOR CORPORATION
Reel/Frame 003971/0393 →
Assignment of Assignors Interest. Dec 28, 1981
From: EBEL, MARK S.
To: NATIONAL SEMICONDUCTOR CORPORATION
Reel/Frame 003971/0395 →
Assignment of Assignors Interest. Dec 28, 1981
From: PRIEL, URY; YARON, GIORA; EBEL, MARK S.
To: NATIONAL SEMICONDUCTOR CORPORATION
Reel/Frame 003971/0396 →
Assignment of Assignors Interest. Dec 28, 1981
From: PRIEL, URY; YARON, GIORA; EBEL, MARK S.
To: NATIONAL SEMICONDUCTOR CORPORATION
Reel/Frame 003971/0397 →
Assignment of Assignors Interest. Jan 18, 1982
From: SHARP, KENNETH P.
To: FAIRCHILD CAMERA AND INSTRUMENT CORPORATION
Reel/Frame 003965/0674 →
Assignment of Assignors Interest. Jan 29, 1982
From: GRIFFITH, PAUL J.
To: FAIRCHILD CAMERA AND INSTRUMENT CORPORATION, A CORP. OF DE.
Reel/Frame 003946/0443 →
Assignment of Assignors Interest. Mar 22, 1982
From: JAHANI, HOOSHANG
To: NATIONAL SEMICONDUCTOR CORPORATION
Reel/Frame 003993/0498 →
Assignment of Assignor's Interest Aug 5, 1996
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: NATIONAL SEMICONDUCTOR CORPORATION
Reel/Frame 008059/0846 →
Assignment of Assignor's Interest Mar 21, 1997
From: NATIONAL SEMICONDUCTOR CORPORATION
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 008535/0103 →
Security Agreement Apr 30, 1999
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: CREDIT SUISSE FIRST BOSTON
Reel/Frame 009883/0800 →
Release of Security Interest May 3, 1999
From: BANKERS TRUST COMPANY
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 009901/0528 →
Release Jul 27, 2000
From: CREDIT SUISSE FIRST BOSTON
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 010996/0537 →