Patent Assignment
Reel/Frame 017586/0081
Security Agreement
Recorded: 2006-01-23
Received: 2006-02-21
Pages: 13
Assignor
NEWPORT FAB, LLC
Executed: 2006-01-06
Assignee
WACHOVIA CAPITAL FINANCE CORPORATION (WESTERN)
251 SOUTH LAKE AVENUE, SUITE 900, PASADENA, CA, 91101, UNITED STATES
Covered Properties
(58)
Method for Integrating Sige Npn and Vertical Pnp Devices on a Substrate and Related Structure
Application:
10/821,425 →
High-K Dielectric Stack in a Mim Capacitor and Method for Its Fabrication
Application:
10/692,431 →
High Density Composite Mim Capacitor with Flexible Routing in Semiconductor Dies
Application:
10/447,397 →
Self-Aligned Bipolar Transistor Having Recessed Spacers and Method for Fabricating Same
Application:
10/442,492 →
Method for Fabricating a Self-Aligned Bipolar Transistor with Planarizing Layer and Related Structure
Application:
10/442,489 →
Self-Aligned Bipolar Transistor Without Spacers and Method for Fabricating Same
Application:
10/442,501 →
Method for Fabrication of Sige Layer Having Small Poly Grains and Related Structure
Application:
10/437,530 →
Method for Fabrication of Emitter of a Transistor and Related Structure
Application:
10/437,723 →
Transparent Phase Shift Mask for Fabrication of Small Feature Sizes
Application:
10/431,073 →
High Density Composite Mim Capacitor with Reduced Voltage Dependence in Semiconductor Dies
Application:
10/410,937 →
Method for Improved Alignment Tolerance in a Bipolar Transistor
Application:
10/375,727 →
Method for Fabricating a Bipolar Transistor in a Bicmos Process and Related Structure
Application:
10/371,706 →
Method for Hard Mask Removal for Deep Trench Isolation and Related Structure
Application:
10/371,416 →
Method for Controlling an Emitter Window Opening in an Hbt and Related Structure
Application:
10/369,027 →
Method for Controlling Critical Dimension in an Hbt Emitter
Application:
10/364,550 →
Method for Patterning Densely Packed Metal Segments in a Semiconductor Die and Related Structure
Application:
10/356,447 →
Bifet Voltage Controlled Oscillator
Application:
10/324,341 →
System for Fabricating a Bipolar Transistor
Application:
10/313,700 →
A Metastable Base in a High-Performance Hbt
Application:
10/313,508 →
Method for Fabricating a Self-Aligned Emitter in a Bipolar Transistor
Application:
10/308,661 →
Method for Fabricating a Selective Epitaxial Hbt Emitter
Application:
10/302,308 →
Method for Eliminating Collector-Base Band Gap in an Hbt
Application:
10/301,885 →
Transparent Phase Shift Mask for Fabrication of Small Feature Sizes
Application:
10/291,116 →
High Gain Bipolar Transistor
Application:
10/290,975 →
Reducing Extrinsic Base Resistance and Improving Manufacturability in an Npn Transistor
Application:
10/290,955 →
Method for Reducing Extrinsic Base Resistance and Improving Manufacturability in an Npn Transistor
Application:
10/290,976 →
Interfacial Oxide in a Transistor
Application:
10/289,821 →
Temperature Insensitive Resistor in an Ic Chip
Application:
10/272,888 →
An Hbt Having a Controlled Emitter Window Opening
Application:
10/265,334 →
Method for Forming Cmos Transistor Spacers in a Bicmos Process and Related Structure
Application:
10/262,714 →
Method for Fabricating a Self-Aligned Bipolar Transistor and Related Structure
Application:
10/218,527 →
Electrostatic Discharge Clamp
Application:
10/199,750 →
Method for Reducing Contamination Prior to Epitaxial Growth and Related Structure
Application:
10/193,056 →
A Bipolar Transistor with Reduced Emitter to Base Capacitance
Application:
10/193,638 →
Damascene Trench Capacitor for Mixed-Signal/Rf Ic Applications
Application:
10/190,459 →
Method and System for Fabricating a Bipolar Transistor and Related Structure
Application:
10/163,661 →
A Bipolar Transistor and Related Structure
Application:
10/163,386 →
Method for Integrating a Metastable Base into a High-Performance Hbt and Related Structure
Application:
10/160,979 →
Method for Reducing Base Resistance in a Bipolar Transistor
Application:
10/133,690 →
Reduced Base Resistance in a Bipolar Transistor
Application:
10/133,697 →
Elimination of Contaminants Prior to Epitaxy and Related Structure
Application:
10/114,749 →
Method for Controlling an Emitter Window Opening in an Hbt and Related Structure
Application:
10/075,701 →
Method for Fabricating a Metal Resistor in an Ic Chip and Related Structure
Application:
10/073,751 →
Structure for a Selective Epitaxial Hbt Emitter
Application:
10/067,034 →
Method and Structure for Eliminating Collector-Base Band Gap Discontinuity in an Hbt
Application:
10/066,872 →
Band Gap Compensated Hbt
Application:
10/066,871 →
Method for Controlling Critical Dimension in an Hbt Emitter and Related Structure
Application:
10/067,159 →
Method for Independent Control of Polycrystalline Silicon-Germanium in an Hbt
Application:
10/053,980 →
Reduced 1/F Noise in Mosfets
Application:
10/015,411 →
Microelectronic Air-Gap Structures and Methods of Forming the Same
Application:
09/967,115 →
Method and Apparatus for High-Resolution in-Situ Plasma Etching of Inorganic and Metal Films
Application:
09/955,677 →
Method for Fabricating Lateral Pnp Heterojunction Bipolar Transistor and Related Structure
Application:
09/853,735 →
Method to Reduce Emitter to Base Capacitance and Related Structure
Application:
09/852,183 →
Method for Opening a Semiconductor Region for Fabricating an Hbt
Application:
09/851,228 →
Method for Reducing Base to Collector Capacitance and Related Structure
Application:
09/850,028 →
High Performance Bipolar Transistor
Application:
09/811,321 →
Thin-film capacitors and methods for forming the same
Application:
09/772,726 →
Method for Fabrication of Ceramic Tantalum Nitride and Imporoved Structures Based Thereon
Application:
09/761,489 →