Patent Assignment
Reel/Frame 020072/0163
Assignment of Assignor's Interest
Recorded: 2007-11-06
Received: 2007-11-06
Pages: 4
Assignor
HITACHI, LTD.
Executed: 2007-03-29
Assignee
RENESAS TECHNOLOGY CORP.
4-1, MARUNOUCHI 2-CHOME, CHIYODA-KU, TOKYO, JPX, JAPAN
Covered Properties
(19)
Semiconductor Memory Device with Memory Cells Operated by Boosted Voltage
Application:
11/657,026 →
Semiconductor Device
Application:
11/500,339 →
Smart Charge-Pump Circuit for Phase-Locked Loops
Application:
11/241,311 →
Semiconductor Device
Application:
11/152,110 →
High-Performance Charge-Pump Circuit for Phase-Locked Loops
Application:
11/104,112 →
Adjustable Lock-in Circuit for Phase-Locked Loops
Application:
11/102,021 →
Smart Lock-in Circuit for Phase-Locked Loops
Application:
11/036,837 →
Variable Lock-in Circuit for Phase-Locked Loops
Application:
11/034,341 →
Variable Start-Up Circuit for Switching Regulators
Application:
11/032,837 →
Z-State Circuit for Phase-Locked Loops
Application:
11/023,683 →
Z-State Circuit for Switching Regualtors
Application:
11/021,522 →
Controllable Idle Time Current Mirror Circuit for Switching Regulators, Phase-Locked Loops, and Delay-Locked Loops
Application:
11/019,142 →
Zero Idle Time Z-State Circuit for Phase-Locked Loops, Delay-Locked Loops, and Switching Regulators
Application:
11/009,648 →
Semiconductor Memory Device with Memory Cells Operated by Boosted Voltage
Application:
10/926,032 →
Low-Power Semiconductor Memory Device
Application:
10/671,513 →
Silhouette image acquisition
Application:
10/413,493 →
Semiconductor Device with Low Power Consumption Memory Circuit
Application:
10/274,985 →
Semiconductor Memory Device with Memory Cells Operated by Boosted Voltage
Application:
10/163,310 →
Method of Testing and Manufacturing Nonvolatile Semiconductor Memory
Application:
10/163,294 →