IP Library › Assignment 026445/0017
Patent Assignment
Reel/Frame 026445/0017

Assignment of Assignor's Interest

Recorded: 2011-06-14 Pages: 13
Assignor
MICRON TECHNOLOGY, INC.
Executed: 2011-05-20
Assignee
ROUND ROCK RESEARCH, LLC
26 DEER CREEK LANE, MOUNT KISCO, NEW YORK, 10549
Covered Properties (48)
Memory System Having Non-Volatile Data Storage Structure for Memory Control Parameters and Method
Patent: 5,627,784 →
Application: 08/508,923 →
Memory System Having Non-Volatile Data Storage Structure for Memory Control Parameters and Method
Patent: 5,880,996 →
Application: 08/850,582 →
Phase Detector for Reducing Noise
Patent: 7,129,794 →
Application: 10/623,959 →
Publication: US 2005/0017810
Arbitration System and Method for Memory Responses in a Hub-Based Memory System
Patent: 7,120,743 →
Application: 10/690,810 →
Publication: US 2005/0086441
Voltage Translator for Multiple Voltage Operations
Patent: 7,006,389 →
Application: 10/734,944 →
Publication: US 2005/0128822
Memory Device Having Strobe Terminals with Multiple Functions
Patent: 7,508,722 →
Application: 10/765,310 →
Publication: US 2005/0165999
Generation of Memory Test Patterns for Dll Calibration
Patent: 7,444,559 →
Application: 10/766,386 →
Publication: US 2005/0166110
Providing Memory Test Patterns for Dll Calibration
Patent: 7,694,202 →
Application: 10/766,611 →
Publication: US 2005/0162948
Power Management Control and Controlling Memory Refresh Operations
Patent: 7,583,551 →
Application: 10/796,111 →
Publication: US 2005/0201174
Memory Device and Method Having Banks of Different Sizes
Patent: 7,082,075 →
Application: 10/804,249 →
Publication: US 2005/0207257
Techniques for Implementing Accurate Operating Current Values Stored in a Database
Patent: 7,120,065 →
Application: 10/816,241 →
Publication: US 2005/0219915
Memory Hub and Method for Memory Sequencing
Patent: 7,162,567 →
Application: 10/846,988 →
Publication: US 2005/0257005
Reconstruction of Signal Timing in Integrated Circuits
Patent: 7,289,378 →
Application: 10/921,435 →
Publication: US 2005/0219919
Reducing Dq Pin Capacitance in a Memory Device
Patent: 7,164,600 →
Application: 11/010,235 →
Publication: US 2006/0126401
Memory Device and Method Having Banks of Different Sizes
Patent: 7,193,927 →
Application: 11/144,229 →
Publication: US 2005/0219917
Memory Device and Method Having Banks of Different Sizes
Patent: 7,177,223 →
Application: 11/144,230 →
Publication: US 2005/0219918
Phase Detector for Reducing Noise
Patent: 7,132,898 →
Application: 11/145,648 →
Publication: US 2005/0280456
Phase Detector for Reducing Noise
Patent: 7,109,807 →
Application: 11/145,664 →
Publication: US 2005/0225368
Memory Device and Method Having Multiple Address, Data and Command Buses
Patent: 7,283,418 →
Application: 11/190,270 →
Publication: US 2007/0025173
Techniques for Implementing Accurate Operating Current Values Stored in a Database
Patent: 7,333,355 →
Application: 11/211,940 →
Publication: US 2006/0053248
Voltage Translator for Multiple Voltage Operations
Patent: 7,227,793 →
Application: 11/297,624 →
Publication: US 2006/0087905
Arbitration System and Method for Memory Responses in a Hub-Based Memory System
Patent: 8,589,643 →
Application: 11/318,356 →
Publication: US 2006/0136683
Reducing Dq Pin Capacitance in a Memory Device
Patent: 7,151,700 →
Application: 11/406,643 →
Publication: US 2006/0193183
Techniques for Implementing Accurate Operating Current Values Stored in a Database
Patent: 7,483,315 →
Application: 11/452,773 →
Publication: US 2006/0233025
Reducing Dq Pin Capacitance in a Memory Device
Patent: 7,319,621 →
Application: 11/493,354 →
Publication: US 2007/0008788
Arbitration system and method for memory responses in a hub-based memory system
Application: 11/499,232 →
Publication: US 2006/0271746
Variable Quantization Adc for Image Sensors
Patent: 7,541,963 →
Application: 11/523,097 →
Publication: US 2007/0069936
Phase Detector for Reducing Noise
Patent: 7,463,099 →
Application: 11/524,842 →
Publication: US 2007/0013450
Interleaved Input Signal Path for Multiplexed Input
Patent: 7,483,334 →
Application: 11/527,948 →
Publication: US 2008/0080291
Memory Hub and Method for Memory Sequencing
Patent: 7,353,320 →
Application: 11/580,424 →
Publication: US 2007/0033353
Reconstruction of Signal Timing in Integrated Circuits
Patent: 7,489,569 →
Application: 11/583,338 →
Publication: US 2007/0061536
Interleaved Memory Program and Verify Method, Device and System
Patent: 7,539,062 →
Application: 11/642,334 →
Publication: US 2008/0151637
Increased Nand Flash Memory Read Throughput
Patent: 7,525,842 →
Application: 11/657,950 →
Publication: US 2008/0181003
Reconstruction of Signal Timing in Integrated Circuits
Patent: 7,453,746 →
Application: 11/677,429 →
Publication: US 2007/0133321
Memory Device and Method Having Banks of Different Sizes
Patent: 7,483,333 →
Application: 11/705,722 →
Publication: US 2007/0280027
Memory Device and Method Having Multiple Address, Data and Command Buses
Patent: 7,548,483 →
Application: 11/900,296 →
Publication: US 2008/0043565
Techniques for Implementing Accurate Device Parameters Stored in a Database
Patent: 7,663,901 →
Application: 12/013,266 →
Publication: US 2008/0130343
Memory Hub and Method for Memory Sequencing
Patent: 7,562,178 →
Application: 12/069,197 →
Publication: US 2008/0133853
Phase Detector for Reducing Noise
Patent: 7,639,090 →
Application: 12/324,077 →
Publication: US 2009/0079485
Interleaved Input Signal Path for Multiplexed Input
Patent: 7,613,070 →
Application: 12/336,330 →
Publication: US 2009/0097331
Power Management Control and Controlling Memory Refresh Operations
Patent: 8,619,485 →
Application: 12/367,216 →
Publication: US 2009/0147608
Memory Device Having Strobe Terminals with Multiple Functions
Patent: 7,751,260 →
Application: 12/397,181 →
Publication: US 2009/0231936
Increased Nand Flash Memory Read Throughput
Patent: 7,903,463 →
Application: 12/425,200 →
Publication: US 2009/0201736
Interleaved Memory Program and Verify Method, Device and System
Patent: 7,808,824 →
Application: 12/471,774 →
Publication: US 2009/0231918
Techniques for Implementing Accurate Device Parameters Stored in a Database
Patent: 8,174,858 →
Application: 12/690,790 →
Publication: US 2010/0122061
Memory Device Having Strobe Terminals with Multiple Functions
Patent: 7,944,761 →
Application: 12/827,954 →
Publication: US 2010/0265777
Interleaved Memory Program and Verify Method, Device and System
Patent: 8,004,897 →
Application: 12/870,377 →
Publication: US 2010/0322003
Increased Nand Flash Memory Read Throughput
Patent: 8,174,892 →
Application: 13/042,071 →
Publication: US 2011/0161591
Related Assignments (14)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jul 27, 1995
From: HARRIS, FRANK W.; COLE, KENNETH A.
To: STAODYN, INC.
Reel/Frame 007601/0323 →
Assignment of Assignor's Interest Apr 8, 1996
From: ROOHPARVAR, FRANKIE F.
To: MICRON QUANTUM DEVICES, INC.
Reel/Frame 007885/0737 →
Assignment of Assignor's Interest Jul 21, 2003
From: LIN, FENG
To: MICRON TECHNOLOGY, INC.
Reel/Frame 014322/0096 →
Assignment of Assignor's Interest Oct 20, 2003
From: MEYER, JAMES W.; KANSKI, CORY
To: MICRON TECHNOLOGY, INC.
Reel/Frame 014645/0265 →
Assignment of Assignor's Interest Dec 12, 2003
From: CORDOBA, MICHAEL V.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 014809/0153 →
Assignment of Assignor's Interest Jan 22, 2004
From: CHOI, JOO S; MANNING, TROY A.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 014933/0993 →
Assignment of Assignor's Interest Jan 28, 2004
From: SWANSON, TRAVIS; ROONEY, JEFF
To: MICRON TECHNOLOGY, INC.
Reel/Frame 015058/0014 →
Assignment of Assignor's Interest Mar 10, 2004
From: KLEIN, DEAN A.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 015087/0653 →
Assignment of Assignor's Interest Mar 18, 2004
From: SKIDMORE, BETH E.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 015120/0557 →
Assignment of Assignor's Interest Apr 1, 2004
From: JANZEN, JEFFERY W.; SCHAEFER, SCOTT; FARRELL, TODD D.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 015181/0595 →
Assignment of Assignor's Interest May 14, 2004
From: JEDDELOH, JOSEPH M.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 015342/0156 →
Assignment of Assignor's Interest May 20, 2004
From: SWANSON, TRAVIS; GREEFF, ROY
To: MICRON TECHNOLOGY, INC.
Reel/Frame 015344/0364 →
Assignment of Assignor's Interest Aug 19, 2004
From: IVANOV, IVAN I.
To: MICRON TECHNOLOGY INC.
Reel/Frame 015716/0473 →
Assignment of Assignor's Interest Dec 10, 2004
From: BA, BEN
To: MICRON TECHNOLOGY, INC.
Reel/Frame 016085/0232 →